參數(shù)資料
型號(hào): MAX19708ETM+T
廠商: Maxim Integrated Products
文件頁數(shù): 27/37頁
文件大?。?/td> 0K
描述: IC ANLG FRNT END 48-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 10
通道數(shù): 4
功率(瓦特): 36.9mW
電壓 - 電源,模擬: 3V
電壓 - 電源,數(shù)字: 3V
封裝/外殼: 48-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-TQFN-EP(7x7)
包裝: 帶卷 (TR)
MAX19708
10-Bit, 11Msps, Ultra-Low-Power
Analog Front-End
______________________________________________________________________________________
33
ADC Gain Error
Ideally, the ADC full-scale transition occurs at 1.5 LSB
below full scale. The gain error is the amount of devia-
tion between the measured transition point and the
ideal transition point with the offset error removed.
ADC Dynamic Parameter Definitions
Aperture Jitter
Figure 15 shows the aperture jitter (tAJ), which is the
sample-to-sample variation in the aperture delay.
Aperture Delay
Aperture delay (tAD) is the time defined between the
rising edge of the sampling clock and the instant when
an actual sample is taken (Figure 15).
Signal-to-Noise Ratio (SNR)
For a waveform perfectly reconstructed from digital
samples, the theoretical maximum SNR is the ratio of
the full-scale analog input (RMS value) to the RMS
quantization error (residual error) and results directly
from the ADC’s resolution (N bits):
SNR(max) = 6.02dB x N + 1.76dB (in dB)
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise. RMS noise includes all spec-
tral components to the Nyquist frequency excluding the
fundamental, the first five harmonics, and the DC offset.
Signal-to-Noise and Distortion (SINAD)
SINAD is computed by taking the ratio of the RMS sig-
nal to the RMS noise. RMS noise includes all spectral
components to the Nyquist frequency excluding the
fundamental and the DC offset.
Effective Number of Bits (ENOB)
ENOB specifies the dynamic performance of an ADC at a
specific input frequency and sampling rate. An ideal
ADC’s error consists of quantization noise only. ENOB for
a full-scale sinusoidal input waveform is computed from:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion (THD)
THD is typically the ratio of the RMS sum of the first five
harmonics of the input signal to the fundamental itself.
This is expressed as:
where V1 is the fundamental amplitude and V2–V6 are
the amplitudes of the 2nd- through 6th-order harmonics.
Third Harmonic Distortion (HD3)
HD3 is defined as the ratio of the RMS value of the third
harmonic component to the fundamental input signal.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio expressed in decibels of the RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest spurious
component, excluding DC offset.
Intermodulation Distortion (IMD)
IMD is the total power of the intermodulation products
relative to the total input power when two tones, f1 and f2,
are present at the inputs. The intermodulation products
are (f1 ±f2), (2 f1), (2 f2), (2 f1 ±f2), (2 f2 ±f1).
The individual input tone levels are at -7dBFS.
3rd-Order Intermodulation (IM3)
IM3 is the power of the worst 3rd-order intermodulation
product relative to the input power of either input tone
when two tones, f1 and f2, are present at the inputs. The
3rd-order intermodulation products are (2 x f1 ±f2), (2 f2
±f1). The individual input tone levels are at -7dBFS.
Power-Supply Rejection
Power-supply rejection is defined as the shift in offset
and gain error when the power supply is changed ±5%.
Small-Signal Bandwidth
A small -20dBFS analog input signal is applied to an
ADC in such a way that the signal’s slew rate does not
THD
(V +V +V +V +V )
V
2
3
2
4
2
5
2
6
2
1
=
20 x log
HOLD
ANALOG
INPUT
SAMPLED
DATA (T/H)
T/H
tAD
tAJ
TRACK
CLK
Figure 15. T/H Aperture Timing
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