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參數資料
| 型號： | MAX19005CCS+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 2/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DCL QUAD 300MHZ ATE 80TQFP |
| 標準包裝： | 1,000 |
| 系列： | ATE |
| 邏輯類型： | 比較器, 驅動器 |
| 電源電壓： | -1 V ~ 5.2 V |
| 位數： | 4 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應商設備封裝： | * |
| 包裝： | * |
Maxim Integrated Products 10
MAX19005
Quad, Ultra-Low-Power,
200Mbps ATE Drivers/Comparators
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +8V, VSS = -5V, VL = +3V, VDDSW = +24.6V, VSSSW = -1.25V, VCOMPHI = +1V, VCOMPLO = 0V, VLDV__= 0V, LOAD EN
LOW_ = LOAD EN HIGH_ = 0, SWEN = 1, TJ = +70°C with an accuracy of ±15NC. Specification compliance with supply and
temperature variations is verified by guard-banding mean shifts of characterization data, unless otherwise noted. All temperature
coefficients measured at TJ = +50°C to +90°C, unless otherwise noted.) (Note 1)
Note 1: All minimum and maximum DC, rise/fall time at +3V swing tests are 100% production tested. The propagation-delay data
to output and propagation-delay comparator tests are guaranteed by design. All specifications are with DUT_ and PMU_
electrically isolated, unless otherwise noted.
Note 2: Resistance measurements are made using ±2.5mA current changes in the loading instrument about the noted value.
Absolute value of the difference in measured resistance over the specified range, tested separately for each current
polarity. Test conditions are at IDUT_ = ±1mA, ±12mA, and ±40mA, respectively.
Note 3: Relative to a straight line through 0V and +3V.
Note 4: VDHV_ = +3V, VDLV_ = 0V, unless otherwise specified. DATA_ and RCV_ VHIGH = +2V, VLOW = 1V, VBBI = +1.5V.
Note 5: Current supplied for a minimum of 10ns. Verified to be greater than or equal to DC drive current by design and
characterization.
Note 6: Undershoot is any reflection of the signal back towards its starting voltage after it has reached 90% of its swing. Preshoot
is any aberration in the signal before it reaches 10% of its swing.
Note 7: At the minimum voltage swing, undershoot is less than 20%. DHV_ and DLV_ references are adjusted to result in the
specified swing.
Note 8: At this pulse width, the output reaches at least 90% of its nominal (DC) amplitude. The pulse width is measured at
DATA_.
Note 9: With the exception of offset and gain/CMRR tests, reference input values are calibrated for offset and gain.
Note 10: Measured by using a servo to locate comparator thresholds.
Note 11: Unless otherwise noted, all propagation delays are measured at 40MHz, VDUT_ = 0 to +1V, VCHV_ = VCLV_ = +0.5V,
tR = tF = 500ps, ZS = 50I, driver in high-impedance mode. Comparator outputs are terminated with 50I to GND.
Measured from VDUT_ crossing calibrated CHV_/CLV_ threshold to midpoint of nominal comparator output swing.
Note 12: VDUT_ = 200mVP-P. Propagation delay is compared to a reference time at +2V.
Note 13: Operating output voltage/current range of passive load and PMU force switch at +24.6V supply. See Figure 1.
Note 14: LOAD EN LOW_ = LOAD EN HIGH_ = 1.
Note 15: Waveform settles to within 5% of final value into 100kI load.
Note 16: IPMU_ = ±2mA at VFORCE = -1V, +11.5V, and +24V. Percent variation relative to value calculated at VFORCE = +11.5V.
Note 17: Time to return to the specified maximum leakage after a +3V, +4V/ns step at DUT_.
Note 18: Load at end of 2ns transmission line; for stability only, AC performance could be degraded.
Note 19: The driver meets all of its timing specifications at the specified digital input voltages.
Note 20: Specifications are simulated and characterized over the full power-supply range. Production tests are performed with
power supplies at typical values.
Note 21: DUT_ (pin switch off), PMU_ maximum voltage is +24V.
Note 22: DUT_ (pin switch off), PMU_ maximum voltage is +10V.
Note 23: All channels driven at 3VP-P, load = 2ns, 50I transmission line terminated with 3pF.
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