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參數(shù)資料
| 型號： | MAX1302BEUG+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT SRL 115KSPS 24TSSOP |
| 標準包裝： | 2,500 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 115k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 1.11W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 8 個單端，單極；8 個單端，雙極；4 個差分，單極；4 個差分，雙極 |
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MAX1302
8-Channel, ±VREF Multirange Inputs,
Serial 16-Bit ADC
______________________________________________________________________________________
13
Detailed Description
The MAX1302 multirange, low-power, 16-bit successive-
approximation ADC operates from a single +5V supply
and has a separate digital supply allowing digital inter-
face with 2.7V to 5.25V systems. This 16-bit ADC has
internal track-and-hold (T/H) circuitry that supports single-
ended and fully differential inputs. For single-ended con-
versions, the valid analog input voltage range spans from
-VREF below ground to +VREF above ground. The maxi-
mum allowable differential input voltage spans from -2 x
VREF to +2 x VREF. Data can be converted in a variety of
software-programmable channel and data-acquisition
configurations. Microprocessor (P) control is made easy
through an SPI-/QSPI-/MICROWIRE-compatible serial
interface.
The MAX1302 has eight single-ended analog input
channels or four differential channels (see the
Block
Diagram). Each analog input channel is independently
software programmable for seven single-ended input
ranges (0V to +VREF/2, -VREF/2 to 0V, 0V to +VREF, -VREF
to 0V, ±VREF/4, ±VREF/2, and ±VREF) and three differential
input ranges (±VREF/2, ±VREF, and ±2 x VREF).
Additionally, all analog input channels are fault tolerant to
±6V. A fault condition on an idle channel does not affect
the conversion result of other channels.
Pin Description (continued)
PIN
NAME
FUNCTION
21
AGND3
Analog Signal Ground 3. AGND3 is the ADC negative reference potential. Connect AGND3 to AGND1.
DGND, DGNDO, AGND3, AGND2, and AGND1 must be connected together.
22
AVDD2
Analog Supply Voltage 2. Connect AVDD2 to a +4.75V to +5.25V power-supply voltage. Bypass AVDD2
to AGND2 with a 0.1F capacitor.
23
AGND2
Analog Ground 2. This ground carries approximately five times more current than AGND1. DGND,
DGNDO, AGND3, AGND2, and AGND1 must be connected together.
24
AGND1
Analog Ground 1. DGND, DGNDO, AGND3, AGND2, and AGND1 must be connected together.
4–20mA
PLC
ACCELERATION
PRESSURE
TEMPERATURE
WHEATESTONE
1
F
0.1
F
AGND2
DGNDO
AGND3
DGND
AVDD2
DVDD
AVDD1
0.1
F
0.1
F
0.1
F
5.0V
MAX1302
CHO
CH1
CH2
CH3
CH4
CH5
CH6
CH7
REF
AGND1
REFCAP
0.1
F
3.3V
MC68HCXX
C
DVDD0
SCLK
CS
DIN
SSTRB
DOUT
VDD
SCK
I/O
MOSI
I/O
MISO
VSS
Figure 1. Typical Application Circuit
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