(VCMDR
參數(shù)資料
型號: MAX1302BEUG+T
廠商: Maxim Integrated Products
文件頁數(shù): 10/31頁
文件大?。?/td> 0K
描述: IC ADC 16BIT SRL 115KSPS 24TSSOP
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 16
采樣率(每秒): 115k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 1.11W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個(gè)單端,單極;8 個(gè)單端,雙極;4 個(gè)差分,單極;4 個(gè)差分,雙極
MAX1302
Differential Common-Mode Range
The MAX1302 differential common-mode range
(VCMDR) must remain within -4.75V to +5.5V to obtain
valid conversion results. The differential common-mode
range is defined as:
In addition to the common-mode input voltage limita-
tions, each individual analog input must be limited to
±6V with respect to AGND1.
The range-select bits R[2:0] in the analog input config-
uration bytes determine the full-scale range for the cor-
responding channel (Tables 2 and 6). Figures 9, 10,
and 11 show the valid analog input voltage ranges for
the MAX1302 when operating with FSR = VREF/2, FSR
= VREF, and FSR = 2 x VREF, respectively. The shaded
area contains the valid common-mode voltage ranges
that support the entire FSR.
V
CH
CMDR
_
=
+
() + ()
2
8-Channel, ±VREF Multirange Inputs,
Serial 16-Bit ADC
18
______________________________________________________________________________________
Table 3. Input Data Word Formats
DATA BIT
OPERATION
D7
(START)
D6
D5
D4
D3
D2
D1
D0
Conversion-Start Byte
(Tables 4 and 5)
1C2
C1
C0
0
Analog-Input Configuration Byte
(Table 2)
1
C2
C1
C0
DIF/SGL
R2
R1
R0
Mode-Control Byte
(Table 7)
1M2
M1
M0
1
0
Table 4. Channel Selection in Single-Ended Mode (DIF/
SGL = 0)
CHANNEL-SELECT BIT
CHANNEL
C2
C1
C0
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
AGND1
000+
-
001
+
-
010
+
-
011
+
-
100
+
-
101
+
-
110
+-
111
+-
Table 5. Channel Selection in True-Differential Mode (DIF/
SGL = 1)
CHANNEL-SELECT BIT
CHANNEL
C2
C1
C0
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
AGND1
00
0
+
-
0
1
RESERVED
01
0
+
-
0
1
RESERVED
10
0
+
-
1
0
1
RESERVED
11
0
+-
1
RESERVED
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