參數(shù)資料
型號: MAX1282BCUE+T
廠商: Maxim Integrated Products
文件頁數(shù): 13/23頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 300KSPS 16-TSSOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數(shù): 12
采樣率(每秒): 300k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 13.75mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個單端,單極;4 個單端,雙極;2 個偽差分,單極;2 個偽差分,雙極
MAX1282/MAX1283
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
20
______________________________________________________________________________________
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
from a straight line on an actual transfer function. This
straight line can be a best-straight-line fit or a line
drawn between the endpoints of the transfer function,
once offset and gain errors have been nullified. The
static linearity parameters for the MAX1282/MAX1283
are measured using the best straight-line fit method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of less than 1LSB guarantees
no missing codes and a monotonic transfer function.
Aperture Width
Aperture width (tAW) is the time the T/H circuit requires
to disconnect the hold capacitor from the input circuit
(for instance, to turn off the sampling bridge, and put
the T/H unit in hold mode).
Aperture Jitter
Aperture jitter (tAJ) is the sample-to-sample variation in
the time between the samples.
Aperture Delay
Aperture delay (tAD) is the time defined between the
rising edge of the sampling clock and the instant when
an actual sample is taken.
Signal-to-Noise Ratio (SNR)
For a waveform perfectly reconstructed from digital
samples, the SNR is the ratio of the full-scale analog
input (RMS value) to the RMS quantization error (resid-
ual error). The ideal, theoretical minimum analog-to-dig-
ital noise is caused only by quantization error and
results directly from the ADC’s resolution (N bits):
SNR = (6.02 N + 1.76)dB
In reality, there are other noise sources besides quanti-
zation noise, including thermal noise, reference noise,
clock jitter, etc. Therefore, SNR is calculated by taking
the ratio of the RMS signal to the RMS noise, which
includes all spectral components minus the fundamen-
tal, the first five harmonics, and the DC offset.
Signal-to-Noise Plus
Distortion (SINAD)
SINAD is the ratio of the fundamental input frequency’s
RMS amplitude to RMS equivalent of all other ADC out-
put signals:
SINAD (dB) = 20 log (SignalRMS / NoiseRMS)
Effective Number of Bits (ENOB)
ENOB indicates the global accuracy of an ADC at a
specific input frequency and sampling rate. An ideal
ADC’s error consists only of quantization noise. With an
input range equal to the ADC’s full-scale range, calcu-
late ENOB as follows:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion (THD)
THD is the ratio of the RMS sum of the input signal’s
first five harmonics to the fundamental itself. This is
expressed as:
where V1 is the fundamental amplitude, and V2 through
V5 are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio of the RMS amplitude of the funda-
mental (maximum signal component) to the RMS value
of the next-largest distortion component.
THD
20
log
V
VVV
V
2
3
2
4
2
4
2
5
2
1
+
+++
+3V
SUPPLIES
DGND
+3V
VDD2
COM
GND
VDD1
DIGITAL
CIRCUITRY
MAX1282
MAX1283
*R = 10
*OPTIONAL
GND
Figure 15. Power-Supply Grounding Connection
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