參數(shù)資料
型號(hào): MAX1198
廠商: Maxim Integrated Products, Inc.
英文描述: Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC with Internal Reference and Parallel Outputs
中文描述: 雙路、8位、100Msps、3.3V、低功耗ADC,內(nèi)置電壓基準(zhǔn)及并行輸出
文件頁(yè)數(shù): 6/22頁(yè)
文件大?。?/td> 557K
代理商: MAX1198
M
Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
6
_______________________________________________________________________________________
Note 1:
Note 2:
Note 3:
Guaranteed by design. Not subject to production testing.
Intermodulation distortion is the total power of the intermodulation products relative to the total input power.
Analog attenuation is defined as the amount of attenuation of the fundamental bin from a converted FFT between two
applied input signals with the same magnitude (peak-to-peak) at f
IN1
and f
IN2
.
REFIN and REFOUT should be bypassed to GND with a 0.1μF (min) and 2.2μF (typ) capacitor.
REFP, REFN, and COM should be bypassed to GND with a 0.1μF (min) and 2.2μF (typ) capacitor.
Typical analog output current at f
INA & B
= 20MHz. For digital output currents vs. analog input frequency,
see
Typical Operating Characteristics
.
See Figure 3 for detailed system timing diagrams. Clock to data valid timing is measured from 50% of the clock
level to 50% of the data output level.
Crosstalk rejection is tested by applying a test tone to one channel and holding the other channel at DC level.
Crosstalk is measured by calculating the power ratio of the fundamental of each channel
s FFT.
Amplitude matching is measured by applying the same signal to each channel and comparing the magnitude of the funda-
mental of the calculated FFT.
Note 10:
Phase matching is measured by applying the same signal to each channel and comparing the phase of the fundamental
of the calculated FFT. The data from both ADC channels must be captured simultaneously during this test.
Note 11:
SINAD settles to within 0.5dB of its typical value in unbuffered external reference mode.
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
PARAMETER
SYMBOL
CONDITIONS
MIN
T YP
1
20
MAX
UNITS
Wake up from sleep mode
Wake up from shutdown mode (Note 11)
Wake-Up Time
t
WAKE
μs
CHANNEL-TO-CHANNEL MATCHING
Crosstalk
Gain Matching
Phase Matching
f
INA or B
= 20MHz at -1dB FS (Note 8)
f
INA or B
= 20MHz at -1dB FS (Note 9)
f
INA or B
= 20MHz at -1dB FS (Note 10)
- 72
0.05
± 0.1
dB
dB
Degrees
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, OV
DD
= 2.5V, 0.1μF and 2.2μF capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10k
resistor, V
IN
= 2V
P-P
(differential with respect to COM), C
L
= 10pF at digital outputs, f
CLK
= 100MHz, T
A
= T
MIN
to T
MAX
, unless
otherwise noted.
+25
°
C guaranteed by production test, <+25
°
C guaranteed by design and characterization. Typical values are at
T
A
= +25
°
C.)
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MAX1198ECM-D 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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