參數(shù)資料
型號(hào): MAX1193ETI+T
廠商: Maxim Integrated Products
文件頁數(shù): 9/26頁
文件大?。?/td> 0K
描述: IC ADC 8BIT 45MSPS DL 28-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 8
采樣率(每秒): 45M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-TQFN-EP(5x5)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個(gè)單端,雙極;2 個(gè)差分,雙極
heavy capacitive loads. To improve the dynamic perfor-
mance of the MAX1193, add 100
resistors in series
with the digital outputs close to the MAX1193. Refer to
the MAX1193 Evaluation Kit schematic for an example
of the digital outputs driving a digital buffer through
100
series resistors.
Power Modes (PD0, PD1)
The MAX1193 has four power modes that are con-
trolled with PD0 and PD1. Four power modes allow the
MAX1193 to efficiently use power by transitioning to a
low-power state when conversions are not required
(Table 3).
Shutdown mode offers the most dramatic power sav-
ings by shutting down all the analog sections of the
MAX1193 and placing the outputs in tri-state. The
wake-up time from shutdown mode is dominated by the
time required to charge the capacitors at REFP, REFN,
and COM. In internal reference mode and buffered
external reference mode, the wake-up time is typically
20s. When operating in the unbuffered external refer-
ence mode, the wake-up time is dependent on the
external reference drivers. When the outputs transition
from tri-state to on, the last converted word is placed
on the digital outputs.
In standby mode, the reference and clock distribution
circuits are powered up, but the pipeline ADCs are
unpowered and the outputs are in tri-state. The wake-
up time from standby mode is dominated by the 2.6s
required to activate the pipeline ADCs. When the out-
puts transition from tri-state to on, the last converted
word is placed on the digital outputs.
MAX1193
Ultra-Low-Power, 45Msps, Dual 8-Bit ADC
______________________________________________________________________________________
17
DIFFERENTIAL INPUT VOLTAGE
(IN+ - IN-)
DIFFERENTIAL INPUT
(LSB)
OFFSET BINARY
(D7–D0)
OUTPUT DECIMAL CODE
+127
(+ full scale – 1 LSB)
1111 1111
255
+126
(+ full scale – 2 LSB)
1111 1110
254
+1
1000 0001
129
0 (bipolar zero)
1000 0000
128
-1
0111 1111
127
-127
(- full scale + 1 LSB)
0000 0001
1
-128 (- full scale)
0000 0000
0
VREF ×
127
128
VREF ×
126
128
VREF ×
1
128
VREF ×
0
128
-VREF ×
1
128
-VREF ×
127
128
-VREF ×
128
Table 2. Output Codes vs. Input Voltage
PD0
PD1
POWER MODE
ADC
INTERNAL
REFERENCE
CLOCK DISTRIBUTION
OUTPUTS
0
Shutdown
Off
Tri-state
0
1
Standby
Off
On
Tri-state
1
0
Idle
On
Tri-state
1
Normal Operating
On
Table 3. Power Logic
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