參數(shù)資料
型號: MAX1185ECM
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: Dual 10-Bit, 20Msps, +3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs
中文描述: 2-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP48
封裝: 7 X 7 MM, TQFP-48
文件頁數(shù): 9/20頁
文件大?。?/td> 495K
代理商: MAX1185ECM
M
Dual 10-Bit, 20Msps, +3V, Low-Power ADC with
Internal Reference and Multiplexed Parallel Outputs
_______________________________________________________________________________________
9
Pin Description
PIN
1
NAME
COM
FUNCTION
Common-Mode Voltage Input/Output. Bypass to GND with a
0.1μF capacitor.
Analog Supply Voltage. Bypass to GND with a capacitor combination of 2.2μF in parallel
with 0.1μF.
2, 6, 11, 14, 15
V
DD
3, 7, 10, 13, 16
4
5
8
9
12
GND
INA+
INA-
INB-
INB+
CLK
Analog Ground
Channel A Positive Analog Input. For single-ended operation, connect signal source to INA+.
Channel A Negative Analog Input. For single-ended operation, connect INA- to COM.
Channel B Negative Analog Input. For single-ended operation, connect INB- to COM.
Channel B Positive Analog Input. For single-ended operation, connect signal source to INB+.
Converter Clock Input
17
T/B
T/B selects the ADC digital output format.
High: Two
s complement.
Low: Straight offset binary.
18
SLEEP
Sleep Mode Input.
High: Deactivates the two ADCs, but leaves the reference bias circuit active.
Low: Normal operation.
19
PD
Power-Down Input.
High: Power-down mode.
Low: Normal operation.
20
OE
Output Enable Input.
High: Digital outputs disabled.
Low: Digital outputs enabled.
21
29
N.C.
Do not connect.
A/B Data Indicator. This digital output indicates CHA data (A/B = 1) or CHB data (A/B = 0)
to be present on the output. A/B follows the external clock signal with typically 6ns delay.
Output Driver Ground
30
A/B
31, 34
OGND
32, 33
OV
DD
Output Driver Supply Voltage. Bypass to OGND with a capacitor combination of 2.2μF in
parallel with 0.1μF.
35
D0A/B
Three-State Digital Output, Bit 0 (LSB). Depending on status of A/B, output data reflects
channel A or channel B data.
36
D1A/B
Three-State Digital Output, Bit 1. Depending on status of A/B, output data reflects channel A
or channel B data.
37
D2A/B
Three-State Digital Output, Bit 2. Depending on status of A/B, output data reflects channel A
or channel B data.
Three-State Digital Output, Bit 3. Depending on status of A/B, output data reflects channel A
or channel B data.
Three-State Digital Output, Bit 4. Depending on status of A/B, output data reflects channel A
or channel B data.
38
D3A/B
39
D4A/B
40
D5A/B
Three-State Digital Output, Bit 5. Depending on status of A/B, output data reflects channel A
or channel B data.
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