參數(shù)資料
型號： MAX117MJI
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： ADC
英文描述： +3V, 400ksps, 4/8-Channel, 8-Bit ADCs with 1UA Power-Down
中文描述： 8-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP28
封裝： 0.600 INCH, CERDIP-28
文件頁數(shù)： 6/12頁
文件大小： 106K
代理商： MAX117MJI
M
+3V, 400ksps, 4/8-Channel,
8-Bit ADCs with 1μA Power-Down
6
_______________________________________________________________________________________
______________________________________________________________Pin Desc ription
Mode Selection Input. Internally pulled low with a 15μA current source. MODE = 0
activates read mode; MODE = 1 activates write-read mode (see Digital Interface
section).
MODE
5
Analog Input Channel 6
Analog Input Channel 5
Analog Input Channel 4
IN6
IN5
IN4
IN3
—
—
1
2
FUNCTION
Three-State Data Outputs
Read Input.
RD
must be low to access data (see Digital Interface section).
D1, D2, D3
RD
7, 8, 9
10
Three-State Data Output (LSB)
D0
6
Lower limit of reference span. REF- sets the zero-code voltage. Range is GND
≤
V
REF-
< V
REF+
.
REF-
13
Ground
GND
12
Interrupt Output.
INT
goes low to indicate end of conversion (see Digital Interface
section).
INT
11
Write-Control Input/Ready-Status Output (see Digital Interface section)
Chip-Select Input.
CS
must be low for the device to recognize
WR
or
RD
inputs.
WR
/RDY
CS
15
16
Upper limit of reference span. REF+ sets the full-scale input voltage. Range is
V
REF-
< V
REF+
≤
V
DD
. Internally hardwired to IN8 (Table 1).
REF+
14
Multiplexer Channel Address Input (MSB)
Multiplexer Channel Address Input
A2
A1
—
21
Three-State Data Output (MSB)
D7
20
Positive Supply, +3.0V to +3.6V
Analog Input Channel 7
V
DD
IN7
24
—
Power-Down Input.
PWRDN
reduces supply current when low.
PWRDN
23
Multiplexer Channel Address Input (LSB)
A0
22
Three-State Data Outputs
D4, D5, D6
17, 18, 19
9, 10, 11
12
8
15
14
13
17
18
16
23
24
22
27
28
PIN
7
1
2
3
4
26
25
19, 20, 21
MAX113
NAME
MAX117
Analog Input Channel 1
Analog Input Channel 2
IN2
IN1
3
4
5
6
Analog Input Channel 3
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