參數資料
型號: MAX1167BEEE+T
廠商: Maxim Integrated Products
文件頁數: 21/30頁
文件大?。?/td> 0K
描述: IC ADC 16BIT 200KSPS 16-QSOP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數: 16
采樣率(每秒): 200k
數據接口: MICROWIRE?,QSPI?,串行,SPI?
轉換器數目: 1
功率耗散(最大): 667mW
電壓電源: 模擬和數字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應商設備封裝: 16-QSOP
包裝: 帶卷 (TR)
輸入數目和類型: 4 個單端,單極
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the full-
scale range of the ADC, calculate the ENOB as follows:
ENOB = (SINAD - 1.76) / 6.02
Figure 24 shows the ENOB as a function of the
MAX1167/MAX1168s’ input frequency.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V1 is the fundamental amplitude and V2 through
V5 are the 2nd- through 5th-order harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next-largest fre-
quency component.
Supplies, Layout, Grounding, and
Bypassing
Use printed circuit (PC) boards with separate analog
and digital ground planes. Do not use wire-wrap
boards. Connect the two ground planes together at the
MAX1167/MAX1168 AGND terminal. Isolate the digital
supply from the analog with a low-value resistor (10
Ω)
or ferrite bead when the analog and digital supplies
come from the same source (Figure 25).
Constraints on sequencing the power supplies and
inputs are as follows:
Apply AGND before DGND.
Apply AIN_ and REF after AVDD and AGND are
present.
DVDD is independent of the supply sequencing.
Ensure that digital return currents do not pass through
the analog ground and that return-current paths are low
impedance. A 5mA current flowing through a PC board
ground trace impedance of only 0.05
Ω creates an error
voltage of about 250V and a 4 LSB error with a +4.096V
full-scale system.
The board layout should ensure that digital and analog
signal lines are kept separate. Do not run analog and dig-
ital lines (especially the SCLK and DOUT) parallel to one
another. If one must cross another, do so at right angles.
The ADC’s high-speed comparator is sensitive to high-
frequency noise on the AVDD power supply. Bypass an
excessively noisy supply to the analog ground plane
with a 0.1F capacitor in parallel with a 1F to 10F
low-ESR capacitor. Keep capacitor leads short for best
supply-noise rejection.
T
+++
2
3
2
4
2
5
2
1
HD
VVVV
V
()
20
log
MAX1167/MAX1168
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
28
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MAX1167CCEE+ 功能描述:模數轉換器 - ADC Integrated Circuits (ICs) Analog to Digital Converters - IC ADC 16BIT 200KSPS 16-QSOP RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
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