參數(shù)資料
型號(hào): MAX11101EWC+T
廠商: Maxim Integrated Products
文件頁數(shù): 7/19頁
文件大小: 0K
描述: IC ADC 14BIT SRL 200KSPS 12WLP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
位數(shù): 14
采樣率(每秒): 200k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 1.3W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 12-WFBGA,WLCSP
供應(yīng)商設(shè)備封裝: 12-WLP
包裝: 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類型: 1 個(gè)單端,單極
其它名稱: MAX11101EWC+TDKR
Maxim Integrated Products 15
MAX11101
14-Bit, +5V, 200ksps ADC with 10A Shutdown
QSPI Interface
Using the high-speed QSPI interface with CPOL = 0 and
CPHA = 0, the MAX11101 supports a maximum fSCLK
of 4.8MHz. Figure 11a shows the MAX11101 connected
to a QSPI master and Figure 11b shows the associated
interface timing.
PIC16 with SSP Module and PIC17 Interface
The MAX11101 is compatible with a PIC16/PIC17 micro-
controller (FC) using the synchronous serial-port (SSP)
module.
To establish SPI communication, connect the controller
as shown in Figure 12a. Configure the PIC16/PIC17 as
system master, by initializing its synchronous serial-port
control register (SSPCON) and synchronous serial-port
status register (SSPSTAT) to the bit patterns shown in
In SPI mode, the PIC16/PIC17 FC allows 8 bits of data
to be synchronously transmitted and received simulta-
neously. Three consecutive 8-bit readings (Figure 12b)
are necessary to obtain the entire 14-bit result from the
ADC. DOUT data transitions on the serial clock’s falling
edge and is clocked into the FC on SCLK’s rising edge.
The first 8-bit data stream contains all zeros. The second
8-bit data stream contains the MSB through D6. The third
8-bit data stream contains bits D5 through D0 followed
by S1 and S0.
Figure 11a. QSPI Connections
Figure 11b. QSPI Interface Timing Sequence (CPOL = CPHA = 0)
Figure 12a. SPI Interface Connection for a PIC16/PIC17
CS
QSPI
SCLK
DOUT
CS
SCK
MISO
VDD
SS
MAX11101
DOUT*
CS
SCLK
*WHEN CS IS HIGH, DOUT = HIGH-Z
MSB
20
16
D13 D12 D11 D10
D9
D8
D7
HIGH-Z
S1
S0
24
12
14
8
6
D6
D3
D2
D1
LSB
D5
D4
END OF
ACQUISITION
D0
SCK
SDI
GND
PIC16/17
I/O
SCLK
DOUT
CS
VDD
MAX11101
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