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參數(shù)資料
| 型號： | MAX1058BETM+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 22/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC/DAC 10BIT 48-TQFN-EP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 43 |
| 類型： | ADC，DAC |
| 分辨率（位）： | 10 b |
| 采樣率（每秒）： | 225k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 48-TQFN-EP（7x7） |
| 包裝： | 管件 |
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MAX1020/MAX1022/MAX1057/MAX1058
10-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
______________________________________________________________________________________
29
disables averaging. For example, if AVGON = 1,
NAVG[1:0] = 00, NSCAN[1:0] = 11 and SCAN[1:0] =
10, 16 results are written to the FIFO, with each result
being the average of four conversions of channel N.
DAC Select Register
Write a command byte 0001XXXX to the DAC select
register (as shown in Table 9) to set up the DAC inter-
face and indicate that another word will follow. The last
4 bits of the DAC select register are don’t-care bits. The
word that follows the DAC select-register command
byte controls the DAC serial interface. See Table 20
and the
DAC Serial Interface section.
Reset Register
Write to the reset register (as shown in Table 11) to
clear the FIFO or reset all registers (excluding the DAC
and GPIO registers) to their default states. When the
RESET bit in the reset register is set to 0, the FIFO is
cleared. Set the RESET bit to one to return all the
device registers to their default power-up state. All reg-
isters power up in state 00000000, except for the setup
register that powers up in clock mode 10 (CKSEL1 = 1
and REFSEL1 = 1). The DAC and GPIO registers are
not reset by writing to the reset register. Set the SLOW
bit to one to add a 15ns delay in the DOUT signal path
to provide a longer hold time. Writing a one to the
SLOW bit also clears the contents of the FIFO. Set the
FBGON bit to one to force the bias block and bandgap
reference to power up regardless of the state of the
DAC and activity of the ADC block. Setting the FBGON
bit high also removes the programmed wake-up delay
between conversions in clock modes 01 and 11.
Setting the FBGON bit high also clears the FIFO.
GPIO Command
Write a command byte to the GPIO command register
to configure, write, or read the GPIOs, as detailed in
Table 12.
Write the command byte 00000011 to configure the
GPIOs. The eight SCLK cycles following the command
byte load data from DIN to the GPIO configuration reg-
ister in the MAX1020. The 16 SCLK cycles following the
command byte load data from DIN to the GPIO configu-
ration register in the MAX1057/MAX1058. See Tables
13 and 14. The register bits are updated after the last
Table 10. DAC Select Register
BIT
NAME
BIT
FUNCTION
—
7 (MSB) Set to zero to select DAC select register.
—
6
Set to zero to select DAC select register.
—
5
Set to zero to select DAC select register.
—
4
Set to one to select DAC select register.
X
3
Don’t care.
X
2
Don’t care.
X
1
Don’t care.
X
0
Don’t care.
Table 11. Reset Register
BIT
NAME
BIT
FUNCTION
—
7 (MSB)
Set to zero to select ADC reset register.
—
6
Set to zero to select ADC reset register.
—
5
Set to zero to select ADC reset register.
—
4
Set to zero to select ADC reset register.
—
3
Set to one to select ADC reset register.
RESET
2
Set to zero to clear the FIFO only. Set to
one to set the device in its power-on
condition.
SLOW
1
Set to one to turn on slow mode.
FBGON
0 (LSB)
Set to one to force internal bias block and
bandgap reference to be always powered
up.
Table 12. GPIO Command Register
BIT NAME
BIT
FUNCTION
—
7 (MSB)
Set to zero to select GPIO register.
—
6
Set to zero to select GPIO register.
—
5
Set to zero to select GPIO register.
—
4
Set to zero to select GPIO register.
—
3
Set to zero to select GPIO register.
—
2
Set to zero to select GPIO register.
GPIOSEL1
1
GPIO configuration bit.
GPIOSEL2
0 (LSB)
GPIO write bit.
GPIOSEL1
GPIOSEL2
FUNCTION
11
GPIO configuration; written data is
entered in the GPIO configuration
register.
10
GPIO write; written data is entered
in the GPIO write register.
01
GPIO read; the next 8/16 SCLK
cycles transfer the state of all GPIO
drivers into DOUT.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1058BETM+ | 功能描述:ADC / DAC多通道 10Bit AD/DACs w/FIFO Temp Sns & GPIO Port RoHS:否 制造商:Texas Instruments 轉換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX1058BETM+T | 功能描述:ADC / DAC多通道 10Bit AD/DACs w/FIFO Temp Sns & GPIO Port RoHS:否 制造商:Texas Instruments 轉換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX1058BETM-T | 功能描述:ADC / DAC多通道 RoHS:否 制造商:Texas Instruments 轉換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX1058EVKIT | 功能描述:數(shù)據(jù)轉換 IC 開發(fā)工具 Programmers, Development Systems RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX105ECS | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Dual, 6-Bit, 800Msps ADC with On-Chip, Wideband Input Amplifier |
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