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參數(shù)資料
| 型號： | MAH28155LXXXX |
| 廠商： | DYNEX SEMICONDUCTOR LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 24 I/O, PIA-GENERAL PURPOSE, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 254K |
| 代理商： | MAH28155LXXXX |
MA28155
11/20
BIDIRECTIONAL BUS L/O CONTROL
Signal Definition (Mode 2)
INTR (Interrupt Request):
A high on this output can be used to interrupt the CPU for
both input or output operations.
Output Operations
OBFN (Output Buffer Full):
The OBF output will go low to indicate that the CPU has
written data out to port A.
ACKN (Acknowledge):
A low on this input enables the tri-state output buffer of port
A to send out the data. Otherwise, the output buffer will be in
the high impedance state,
INTE 1 (INTE register bit associated with OBFN):
Controlled by Bit Set/Reset of PC6.
Input Operations
STBN (Strobe input):
A low on this input loads data in to the input latch,
IBF (Input Buffer Full Register Bit):
A high on this output indicates data has been loaded in to
the input latch,
INTE 2 (The INTE register bit associated with IBF).
Controlled by Bit Set/Reset of PC4.
Figure 16: Mode 2 Bidirectional
DSN
RD/WN
OBFAN
ACKAN
STBAN
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