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MAC7100 Microcontroller Family Hardware Specifications
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MOTOROLA
Electrical Characteristics
3.10.2 ATD Accuracy
Table 27 and Table 28 specify the ATD conversion performance excluding any errors due to current
injection, input capacitance and source resistance.
For the following definitions see also Figure 8.
Differential Non-Linearity (DNL) is defined as the difference between two adjacent switching steps.
The Integral Non-Linearity (INL) is defined as the sum of all DNLs:
Table 27. ATD Conversion Performance in 5 V Range
Conditions shown in Table 6 unless otherwise noted.
V
REF
= V
RH
– V
RL
= 5.12 V, resulting in one 8 bit count = 20 mV and one 10 bit count = 5 mV
f
ATDCLK
= 2.0 MHz, 4.5 V
≤
V
DD
A
≤
5.5 V
Num C
Rating
Symbol
Min
Typ
Max
Unit
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
P 10-bit Resolution
P 10-bit Differential Nonlinearity
P 10-bit Integral Nonlinearity
P 10-bit Absolute Error
1
P 8-bit Resolution
P 8-bit Differential Nonlinearity
P 8-bit Integral Nonlinearity
P 8-bit Absolute Error
1
LSB
DNL
INL
AE
LSB
DNL
INL
AE
—
–1
–2.5
–3
—
–0.5
–1.0
–1.5
5
—
±
1.5
±
2.0
20
—
±
0.5
±
1.0
—
1
2.5
3
—
0.5
1.0
1.5
mV
Counts
Counts
Counts
mV
Counts
Counts
Counts
1
These values include the quantization error which is inherently 1/2 count for any A/D converter.
Table 28. ATD Conversion Performance in 3.3 V Range
Conditions shown in Table 6 unless otherwise noted.
V
REF
= V
RH
– V
RL
= 5.12 V, resulting in one 8 bit count = 20 mV and one 10 bit count = 5 mV
f
ATDCLK
= 2.0 MHz, 4.5 V
≤
V
DD
A
≤
5.5 V
Num C
Rating
Symbol
Min
Typ
Max
Unit
R1
R2
R3
R4
R5
R6
R7
R8
P 10-bit Resolution
P 10-bit Differential Nonlinearity
P 10-bit Integral Nonlinearity
P 10-bit Absolute Error
1
P 8-bit Resolution
P 8-bit Differential Nonlinearity
P 8-bit Integral Nonlinearity
P 8-bit Absolute Error
1
LSB
DNL
INL
AE
LSB
DNL
INL
AE
—
–1.5
–3.5
–5
—
–0.5
–1.5
–1.5
3.25
—
±
1.5
±
2.0
13
—
±
1.0
±
1.0
—
1.5
3.5
5
—
0.5
1.5
1.5
mV
Counts
Counts
Counts
mV
Counts
Counts
Counts
1
These values include the quantization error which is inherently 1/2 count for any A/D converter.
DNL i
( )
V
-----------------------
V
1
–
–
1 LSB
1
–
=
INL n
DNL i
( )
i
1
=
n
∑
V
1 LSB
0
-------–
n
–
=
=
F
Freescale Semiconductor, Inc.
n
.