參數(shù)資料
型號(hào)： MAC7131MPV
廠商： Motorola, Inc.
英文描述： MAC7100 Microcontroller Family Hardware Specifications
中文描述： MAC7100微控制器系列硬件規(guī)格
文件頁數(shù)： 23/48頁
文件大?。?/td> 1514K
代理商： MAC7131MPV
23
MAC7100 Microcontroller Family Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Electrical Characteristics
3.10 Analog-to-Digital Converter Characteristics
Table 24 and Table 25 show conditions under which the ATD operates. The following constraints exist to
obtain full-scale, full range results: V
SS
A
≤
V
RL
≤
V
IN
≤
V
RH
≤
V
DD
A. This constraint exists because the
sample buffer amplifier cannot drive beyond the ATD power supply levels. If the input level goes outside
of this range it will effectively be clipped.
3.10.1 Factors Influencing Accuracy
Three factors — source resistance, source capacitance and current injection
—
have an influence on the
accuracy of the ATD.
Table 24. ATD Operating Characteristics in 5 V Range
Conditions shown in Table 6 unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
M1
D Reference Potential
Low
High
V
RL
V
RH
V
SS
A
V
DD
A
÷
2
4.50
—
—
V
DD
A
÷
2
V
DD
A
5.25
V
V
M2
C Differential Reference Voltage
1
1
2
Full accuracy is not guaranteed when differential voltage is less than 4.50 V
Minimum time assumes final sample period of 2 ATD clocks; maximum time assumes final sample period of 16 ATD clocks.
V
RH
– V
RL
f
ATDCLK
N
CONV10
T
CONV10
N
CONV8
T
CONV8
t
REC
I
REF
I
REF
5.00
V
M3
D ATD Clock Frequency
D ATD 10-bit Conversion PeriodClock Cycles
2
0.5
—
2.0
MHz
M4
@ 2.0MHz f
ATDCLK
14
7
—
—
28
14
Cycles
μ
s
M5
D ATD 8-bit Conversion PeriodClock Cycles
2
@ 2.0MHz f
ATDCLK
12
6
—
—
26
13
Cycles
μ
s
M6
D Recovery Time (V
DD
A = 5.0 V)
P
Reference Supply current 1 ATD module enabled
—
—
20
μ
s
M7
—
—
0.375
mA
M8
P
Reference Supply current 2 ATD modules enabled
—
—
0.750
mA
Table 25. ATD Operating Characteristics in 3.3 V Range
Conditions shown in Table 6, with V
DD
X = 3.3 V ±10% and a temperature maximum of +140
°
C unless otherwise noted.
Num C
Rating
Symbol
Min
Typ
Max
Unit
N1
D Reference Potential
Low
High
V
RL
V
RH
V
SS
A
V
DD
A
÷
2
3.0
—
—
V
DD
A
÷
2
V
DD
A
3.6
V
V
N2
C Differential Reference Voltage
1
1
2
Full accuracy is not guaranteed when differential voltage is less than 3.0 V
Minimum time assumes final sample period of 2 ATD clocks; maximum time assumes final sample period of 16 ATD clocks.
V
RH
–V
RL
f
ATDCLK
N
CONV10
T
CONV10
N
CONV8
T
CONV8
t
REC
I
REF
I
REF
3.3
V
N3
D ATD Clock Frequency
D ATD 10-bit Conversion PeriodClock Cycles
2
Conv, Time at 2.0MHz ATD Clock f
ATDCLK
D ATD 8-bit Conversion PeriodClock Cycles
2
Conv, Time at 2.0MHz ATD Clock f
ATDCLK
D Recovery Time (V
DD
A=5.0 V)
P
Reference Supply current 1 ATD module enabled
0.5
—
2.0
MHz
N4
14
7
—
—
28
14
Cycles
μ
s
N5
12
6
—
—
26
13
Cycles
μ
s
N6
—
—
20
μ
s
N7
—
—
0.375
mA
N8
P
Reference Supply current 2 ATD modules enabled
—
—
0.250
mA
F
Freescale Semiconductor, Inc.
n
.
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