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參數(shù)資料
| 型號(hào)： | MA838 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | SINGLE PHASE PULSE WIDTH MODULATION WAVEFORM GENERATOR |
| 中文描述： | 單相脈寬調(diào)制波形發(fā)生器 |
| 文件頁(yè)數(shù)： | 12/13頁(yè) |
| 文件大?。?/td> | 314K |
| 代理商： | MA838 |
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11
MA838
HARDWARE INPUT/OUTPUT FUNCTIONS
Set Output Trip (SET TRIP input)
The SET TRIP input is provided separately from the
microprocessor interface in order to allow an external source
to override the microprocessor and provide a rapid shutdown
facility. For example, logic signals from overcurrent sensing
circuitry or the microprocessor ‘watchdog’ might be used to
activate this input.
When the SET TRIP input is taken to a logic high, the output
trip latch is activated. This results in the
TRIP
output and the
PWM outputs being latched low immediately. This condition
can only be cleared by applying a reset cycle to the
RST
input.
It is essential that when not in use this pin is tied low and
isolated from potential sources of noise; on no account should
it be left floating.
SET TRIP is latched internally at the master clock rate in
order to reduce noise sensitivity.
Output Trip Status (
TRIP
output)
The
TRIP
output indicates the status of the output trip latch
and is active low.
Reset (
RST
input)
The
RST
input performs the following functions when active
(low):
1. PWM outputs are forced low (if not already low) thereby
turning off the drive switches.
2. All internal counters are reset to zero (this corresponds to 0°
for the red phase output).
3. The rising edge of
RST
reactivates the PWM outputs
resetting the output trip and setting the
TRIP
output high –
assuming that the SET TRIP input is inactive (i.e. Iow).
Clock (CLK input)
The CLK input provides a timing reference used by the
MA838 for all timings related to the PWM outputs. The
microprocessor interface, however, derives all its timings from
the microprocessor and therefore the microprocessor and the
MA838 may be run either from the same or from different
clocks.
Waveform segment
0°- 30°
30·23°- 60°
60·23°- 89·77°
Sample number
0 - 127
128 - 255
256 - 383
Table 8 90° of the 360° cycle is divided into 384 8-bit
samples
Fig. 18 90° sample of typical power waveform
WAVEFORM DEFINITION
The waveform amplitude data used to construct the PWM
output sequence is read from the internal 384 x 8 ROM. This
contains the 90° span of the waveform as shown in Fig. 18.
Each successive 8-bit sample linearly represents the
instantaneous amplitude of the waveform. It is assumed that
the waveform is symmetrical about the 90°, 180° and 270°
axes.The MA828 reconstructs the full 360° waveform by reading
the 0°-90° section held in ROM and assigning negative values
for the second half of the cycle.
The 384 8-bit samples are regularly spaced over the 0° to
90° span, giving an angular resolution of approximately 0·23°.
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