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參數(shù)資料
| 型號(hào)： | M80C51FB |
| 廠商： | Intel Corp. |
| 英文描述： | CHMOS Single-Chip 8-Bit Microcontroller(CHMOS單芯片8位微控制器) |
| 中文描述： | CHMOS單片8位微控制器（CHMOS單芯片8位微控制器） |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 184K |
| 代理商： | M80C51FB |
M80C51FB
A.C. CHARACTERISTICS
(Over Specified Operating Conditions)
EXTERNAL PROGRAM MEMORY CHARACTERISTICS
12 MHz
Oscillator
16 MHz
Oscillator
Variable
Oscillator
Symbol
Parameter
Unit
Min
Max
Min
Max
Min
Max
1/TCLCL
Oscillator Frequency
M80C51FB
M80C51FB-16
3.5
3.5
12
16
MHz
TLHLL
ALE Pulse Width
127
85
2TCLCL
b
40
TCLCL
b
40
TCLCL
b
30
ns
TAVLL
Address Valid to ALE Low
43
23
ns
TLLAX
Address Hold After ALE Low
53
33
ns
TLLIV
ALE Low to
Valid Instruction In
234
150
4TCLCL
b
110
ns
TLLPL
ALE Low to PSEN Low
53
33
TCLCL
b
30
3TCLCL
b
45
ns
TPLPH
PSEN Pulse Width
205
143
ns
TPLIV
PSEN Low to
Valid Instruction In
145
83
3TCLCL
b
115
ns
TPXIX
Input Instruction Hold
After PSEN
0
0
0
ns
TPXIZ
Input Instruction Float
After PSEN
59
38
TCLCL
b
25
ns
TAVIV
Address to
Valid Instruction In
312
208
5TCLCL
b
115
ns
TPLAZ
PSEN Low to Address Float
10
10
20
ns
TRLRH
RD Pulse Width
400
275
6TCLCL
b
100
6TCLCL
b
100
ns
TWLWH
WR Pulse Width
400
275
ns
TRLDV
RD Low to Valid Data In
252
147.5
5TCLCL
b
175
ns
TRHDX
Data Hold After RD
0
0
0
ns
TRHDZ
Data Float After RD
107
65
2TCLCL
b
60
8TCLCL
b
160
9TCLCL
b
175
3TCLCL
a
50
ns
TLLDV
ALE Low to Valid Data In
517
350
ns
TAVDV
Address to Valid Data In
585
398
ns
TLLWL
ALE Low to RD or WR Low
200
300
138
238
3TCLCL
b
50
4TCLCL
b
130
TCLCL
b
50
TCLCL
b
50
7TCLCL
b
150
ns
TAVWL
Address Valid to WR Low
203
120
ns
TQVWX
Data Valid before WR
33
13
ns
TWHQX
Data Hold after WR
33
13
ns
TQVWH
Data Valid to WR High
433
288
ns
TRLAZ
RD Low to Address Float
0
0
0
ns
TWHLH
RD or WR High to ALE High
43
123
23
103
TCLCL
b
40
TCLCL
a
40
ns
NOTE:
7. Case temperatures are ‘‘instant on’’.
9
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