
February 5, 2004
Am75PDL191CHH/Am75PDL193CHH
123
A D V A N C E I N F O R M A T I O N
AC Characteristics and Operating Conditions
Notes:
1.
Stresses greater than listed under “Absolute Maximum Ratings” may
cause permanent damage to the device.
2.
All voltages are reference to GND.
3.
IDDO depends on the cycle time.
4.
IDDO depends on output loading. Specified values are defined
with the output open condition.
5.
6.
AC measurements are assumed t
R
, t
F
= 5 ns.
Parameters t
, t
, t
and t
define the time at which the
output goes the open condition and are not output voltage
reference levels.
Data cannot be retained at deep power-down standby mode.
7.
Symbol
t
RC
t
ACC
t
CO
t
OE
t
BA
t
COE
t
OEE
t
BE
t
OD
t
ODO
t
BD
t
OH
t
PM
t
PC
t
AA
t
AOH
t
WC
t
WP
t
CW
t
BW
t
AW
t
AS
t
WR
t
CEH
t
WEH
t
ODW
t
OEW
t
DS
t
DH
t
CS
t
CH
t
CPD
t
CHC
t
CHP
Parameter
Min
70
-
-
-
-
10
0
0
-
-
-
10
70
30
-
10
70
50
70
60
60
0
0
10
6
-
0
30
0
0
300
10
0
30
Max
1000
70
70
25
25
-
-
-
20
20
20
-
10000
-
30
-
10000
-
-
-
-
-
-
-
-
20
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
μ
s
Read Cycle Time
Address Access Time
Chip Enable (CE1#) Access Time
Output Enable Access Time
Data Byte Control Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
Output Data Hold Time
Page Mode Time
Page Mode Cycle Time
Page Mode Address Access Time
Page Mode Output Data Hold Time
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Byte Control to End of Write
Address Valid to End of Write
Address Set-up Time
Write Recovery Time
Chip Enable High Pulse Width
Write Enable High Pulse Width
WE# Low to Output High-Z
WE# High to Output Active
Data Set-up Time
Data Hold Time
CE2 Set-up Time
CE2 Hold Time
CE2 Pulse Width
CE2 Hold from CE1#
CE2 Hold from Power on