參數(shù)資料
型號: M68HC11D3CFB1
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 1 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 82/124頁
文件大?。?/td> 5398K
代理商: M68HC11D3CFB1
RESETS AND INTERRUPTS
5-16
TECHNICAL DATA
Figure 5-3 Interrupt Source Resolution within SCI
5.5 Low-Power Operation
Both STOP and WAIT suspend CPU operation until a reset or interrupt occurs. The
WAIT condition suspends processing and reduces power consumption to an interme-
diate level. The STOP condition turns off all on-chip clocks and reduces power con-
sumption to an absolute minimum while retaining the contents of all 192 bytes of RAM.
5.5.1 WAIT
The WAI opcode places the MCU in the WAIT condition, during which the CPU regis-
ters are stacked and CPU processing is suspended until a qualified interrupt is detect-
ed. The interrupt can be an external IRQ, an XIRQ, or any of the internally generated
interrupts, such as the timer or serial interrupts. The on-chip crystal oscillator remains
active throughout the WAIT standby period.
The reduction of power in the WAIT condition depends on how many internal clock sig-
FLAG
Y
N
OR = 1?
Y
N
Y
N
TDRE = 1?
TC = 1?
Y
N
IDLE = 1?
Y
N
Y
N
Y
N
Y
N
ILIE = 1?
RIE = 1?
TIE = 1?
BEGIN
RE = 1?
Y
N
Y
N
TE = 1?
TCIE = 1?
Y
N
RE = 1?
Y
N
RDRF = 1?
VALID SCI REQUEST
NO
VALID SCI REQUEST
INT SOURCE RES
F
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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