參數(shù)資料
型號: M68AW512MN55ND6T
廠商: 意法半導(dǎo)體
英文描述: 8 Mbit (512K x16) 3.0V Asynchronous SRAM
中文描述: 8兆位(為512k × 16)3.0V異步SRAM
文件頁數(shù): 12/19頁
文件大?。?/td> 296K
代理商: M68AW512MN55ND6T
M68AW512M
12/19
Figure 10. Write Enable Controlled, Write AC Waveforms
Note: 1. During this period DQ0-DQ15 are in output state and input signals should not be applied.
Figure 11. Chip Enable Controlled, Write AC Waveforms
AI05841
tAVAV
tWHAX
tDVWH
DATA INPUT
A0-A18
E
W
DQ0-DQ15
VALID
tAVWH
tWLWH
tAVWL
tWLQZ
tWHDX
tWHQX
tBLWH
UB, LB
tELWH
DATA
(1)
DATA
(1)
AI05842
tAVAV
tEHAX
tDVEH
A0-A18
E
W
DQ0-DQ15
VALID
tAVEH
tAVEL
tELEH
tEHDX
DATA INPUT
tBLEH
UB, LB
tWLEH
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