參數(shù)資料
型號: M68AR512DN70ZB1T
廠商: 意法半導體
英文描述: 8 Mbit 512K x16 1.8V Asynchronous SRAM
中文描述: 8兆位為512k x16 1.8異步SRAM
文件頁數(shù): 16/19頁
文件大小: 140K
代理商: M68AR512DN70ZB1T
M68AR512D
16/19
Figure 16. TFBGA48 8x10mm - 6x8 ball array, 0.75 mm pitch, Bottom View Package Outline
Note: Drawing is not to scale.
Table 11. TFBGA48 8x10mm - 6x8 ball array, 0.75 mm pitch, Package Mechanical Data
Symbol
millimeters
inches
Typ
Min
Max
Typ
Min
Max
A
1.200
0.0472
A1
0.260
0.0102
A2
0.900
0.0354
b
0.350
0.450
0.0138
0.0177
D
8.000
7.900
8.100
0.3150
0.3110
0.3189
D1
3.750
0.1476
ddd
0.100
0.0039
E
10.000
9.900
10.100
0.3937
0.3898
0.3976
E1
5.250
0.2067
e
0.750
0.0295
FD
2.125
0.0837
FE
2.375
0.0935
SD
0.375
0.0148
SE
0.375
0.0148
E1
E
D1
D
e
b
SD
SE
BGA-Z28
ddd
BALL "A1"
FD
FE
A2
A1
A
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