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參數(shù)資料
| 型號： | M66853J |
| 廠商： | Mitsubishi Electric Corporation |
| 元件分類： | FIFO |
| 英文描述： | SRAM TYPE FIFO MEMORY |
| 中文描述： | FIFO存儲器SRAM的類型 |
| 文件頁數(shù)： | 12/15頁 |
| 文件大小： | 118K |
| 代理商： | M66853J |
SRAM TYPE FIFO MEMORY
M66850J/FP, M66851J/FP
M66852J/FP, M66853J/FP
MITSUBISHI <DIGITAL ASSP>
Programmable Full Flag Timing
t
CLKH
t
CLKL
t
ENS
t
ENH
t
ENS
t
ENH
t
ENS
t
ENH
t
PAF
t
PAF
Full-(m+1) words in FIFO(1)
Full-m words
in FIFO(2)
t
SKEW2
(3)
(4)
WCLK
WEN1
RCLK
REN1
REN2
WEN2
(If Applicable)
PAF
NOTES :
1. PAF offset=m.
2. 64-m words in for M66850, 256-m words in for M66851,512-m words in for M66852, 1024-m words in for M66853.
3. t
SKEW2
is the minimum time between a rising RCLK edge and a rising WCLK edge for PAF to change during that clock cycle.
If the time between the rising edge of RCLK and the rising edge of WCLK is less than t
SKEW2
, then PAF may not change state
untill the next rising edge of WCLK.
4. If a write is performed on this rising edge of the write clock,there will be Full-(m-1) words in the FIFO when PAF goes LOW.
12
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