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參數(shù)資料
| 型號： | M66281FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 5120 x 8-BIT x 2 LINE MEMORY |
| 中文描述： | 5120 × 8位× 2列內(nèi)存 |
| 文件頁數(shù)： | 10/13頁 |
| 文件大小： | 125K |
| 代理商： | M66281FP |
5120 x 8-BIT x 2 LINE MEMORY
M66281FP
MITSUBISHI <DIGITAL ASSP>
WCK
RCK
Dn
t
RESS
t
RESH
(0)
(1)
(2)
(5117)
(5118)
t
DS
t
DH
(5119)
t
DS
t
DH
(0)
(1)
(2)
(3)
t
AC
t
OH
WRESB
RRESB
n-bit delay bit
(Reset at cycles according to the delay length)
WCK
RCK
Dn
t
RESS
t
RESH
(0)
(1)
(2)
(n-3)
(n-2)
t
DS
t
DH
(n-1)
t
DS
t
DH
(0)
(1)
(2)
(3)
t
AC
t
OH
t
RESS
t
RESH
WRESB
RRESB
Q0n
(Q1n)
Q0n
(Q1n)
VARIABLE LENGTH DELAY BIT
1 line (5120 bits) delay
Input data can be written at the rising edge of WCK after write cycle and output data is read at the rising edge of RCK before read
cycle to easily make 1 line delay.
5120 cycle 5121 cycle 5122 cycle
(0')
(1')
5118 cycle 5119 cycle
0 cycle
1 cycle
2 cycle
(2')
5120 cycle
WEB, REB = "L"
(0')
(1')
(2')
(3')
n cycle
(0')
n+1 cycle
(1')
n+2 cycle
(2')
n-2 cycle
n-1 cycle
0 cycle
1 cycle
2 cycle
n+3 cycle
(3')
WEB, REB = "L"
m
≥
3
(0')
(1')
(2')
(3')
m cycle
10
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PDF描述 |
|---|---|
| M66282FP | 8192 x 8-BIT LINE MEMORY |
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| M66290AGP | USB DEVICE CONTROLLER |
| M66300FP | PARALLEL-IN SERIAL-OUT DATA BUFFER WITH FIFO |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66282FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:8192 x 8-BIT LINE MEMORY |
| M66282FP(#TB0T) | 制造商:Renesas Electronics Corporation 功能描述: |
| M66287FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:262144-word x 8-bit x 3-FIELD MEMORY |
| M66288FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:262144-word x 8-bit x 3-FIFO MEMORY |
| M66290AFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:USB DEVICE CONTROLLER |
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