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參數(shù)資料
| 型號(hào)： | M66011FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SERIAL BUS CONTROLLER |
| 中文描述： | 串行總線控制器 |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大小： | 96K |
| 代理商： | M66011FP |
4
MITSUBISHI
DIGITAL ASSP
M66011FP
SERIAL BUS CONTROLLER
2. Read operation
When a read access arrives, M66011 outputs data in par-
allel to data bus. The data output at this moment may be
serial input data, or data on internal status resister.
When a read access arrives when the address setting is
(A1, A0) = (1, 0), 8-bits of 9-bit serial input data, excluding
the acknowledge bit, is output to data bus While RD is “L”.
When a read access arrives when the address setting is
(A1, A0) =(1, 1), interrupt control register, busy flag, serial-
input acknowledge bit and clock dividing ratio register are
output to data bus while RD is “L”.
Read Operation Basic Function
CS
0
0
1
Functions
Date bus
Data bus
←
←
Serial input shift register
Status register
A1
1
A0
0
1
RD
0
0
WR
1
1
Read Output Data Details
(1)When (A1, A0) is (1, 0):
(2)When (A1, A0) is (1, 1):
D7
D6
D5
D4
D3
D2
D1
Serial input data least significant bit (DI
0
)
D0
Serial input data most significant bit (DI
7
)
Data bus
CS
RD
Data buses
D0~D7
High impedance
VALID
Read Operation Timing
High impedance
D7
D6
D5
D4
D3
D2
D1
D0
D1
0
0
1
1
D0
0
1
0
1
Divider ratio
1/2
1/4
1/8
1/16
Not specified
Interrupt control register data
“0”: Interrupt output disable
“1”: Interrupt output disable
Data bus
Busy flag (Refer to 3, Serial data input/output operation for details.)
“0”: Access possible
“1”: Serial communication in progress. Write access prohibited.
Shift clock dividing ratio
Acknowledge bit
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