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參數(shù)資料
| 型號： | M5M51016RT-70LL-I |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| 中文描述： | 1048576位（65536字由16位）的CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 6/7頁 |
| 文件大小： | 79K |
| 代理商： | M5M51016RT-70LL-I |
MITSUBISHI LSIs
1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM
MITSUBISHI
ELECTRIC
M5M51016BTP,RT-70L,-10L-I,
-70LL,-10LL-I
Write cycle ( BC control mode)
Note 3: Hatching indicates the state is "don't care".
4: Writing is executed while CS high overlaps BC
1
and/or BC
2
low and W low.
5: When the falling edge of W is simultaneously or prior to the falling edge of BC
1
and/or BC
2
or rising edge of CS, the outputs are
maintained in the high impedance state.
6: Don't apply inverted phase signal externally when DQ pin is output mode.
Write cycle (CS control mode)
t
su (BC1)
or
t
su (BC2)
(Note 3)
(Note 3)
t
rec (W)
t
h (D)
t
CW
(Note 5)
(Note 3)
(Note 3)
t
su (A)
(Note 4)
t
su (D)
t
h (D)
t
CW
(Note 5)
(Note 3)
(Note 3)
t
su (CS)
t
rec (W)
t
su (A)
(Note 4)
(Note 3)
(Note 3)
t
su (D)
DATA IN
STABLE
DATA IN
STABLE
DQ
1
~
16
BC
1
and/or BC
2
CS
W
A
0
~
15
DQ
1
~
16
BC
1
and/or BC
2
CS
W
A
0
~
15
6
相關PDF資料 |
PDF描述 |
|---|---|
| M5M51016BTP-70L | 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51016BTP-70L-I | 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M51016BTP-70LL-I | 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM |
| M5M512R88DJ-10 | 1048576-BIT (131072-WORD BY 8-BIT) CMOS STATIC RAM |
| M5M512R88DJ-12 | 1048576-BIT (131072-WORD BY 8-BIT) CMOS STATIC RAM |
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