參數(shù)資料
型號: M5M4V16G50DFP-8
廠商: Mitsubishi Electric Corporation
英文描述: 16M (2-BANK x 262144-WORD x 32-BIT) Synchronous Graphics RAM
中文描述: 1,600(2 -銀行甲262144字× 32位)同步圖形RAM
文件頁數(shù): 17/33頁
文件大?。?/td> 167K
代理商: M5M4V16G50DFP-8
M5M4V16G50DFP -8, -10, -12
Jan'97
Preliminary
MITSUBISHI LSIs
16M (2-BANK x 262144-WORD x 32-BIT) Synchronous Graphics RAM
MITSUBISHI ELECTRIC
SGRAM (Rev. 0.0)
Command
Address
CLK
Read
Y
Q0
Q1
Q2
Q3
Write
Y
D0
D1
D2
D3
/CAS Latency
Burst Length
Burst Length
DQ
Burst Type
CL= 3
BL= 4
A2
A1
A0
Initial Address BL
Sequential
Interleaved
Column Addressing
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
-
0
0
-
0
1
-
1
0
-
1
1
-
-
0
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1
2
3
4
5
6
7
0
1
0
3
2
5
4
7
6
2
3
4
5
6
7
0
1
2
3
0
1
6
7
4
5
3
4
5
6
7
0
1
2
3
2
1
0
7
6
5
4
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
5
6
7
0
1
2
3
4
5
4
7
6
1
0
3
2
6
7
0
1
2
3
4
5
6
7
4
5
2
3
0
1
7
0
1
2
0
1
2
3
1
2
3
0
2
3
0
1
3
0
0
1
7
6
5
4
0
1
2
3
1
0
3
2
2
3
0
1
3
2
0
1
-
-
1
1
2
1
0
3
4
5
6
3
2
1
0
1
0
1
0
8
4
2
NOTE:
FULL PAGE BURST is an extension of the above tables of Sequential Addressing with the length being 256.
相關(guān)PDF資料
PDF描述
M5M4V64S20ATP-10 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S20ATP-10L 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S20ATP-12 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S20ATP-8 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S20ATP-8A 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M5M4V17400CTP-60 制造商:Mitsubishi Electric 功能描述:
M5M4V18165CJ-7S 制造商:MITSUBI 功能描述:Electronic Component
M5M4V4169TP20 制造商:MITSU 功能描述:
M5M4V4265CJ 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM
M5M4V4265CJ-5 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM