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參數(shù)資料
| 型號： | M5M29GB160BVP-80 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 16,777,216-BIT (2097,152-WORD BY 8-BIT / 1048,576-WORD BY16-BIT)CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY |
| 中文描述： | 16,777,216位（2097,152 - Word的8位/ 1048,576字BY16位）的CMOS 3.3只，塊擦除閃存 |
| 文件頁數(shù)： | 4/25頁 |
| 文件大?。?/td> | 229K |
| 代理商： | M5M29GB160BVP-80 |
MITSUBISHI LSIs
16,777,216-BIT (2097,152-WORD BY 8-BIT / 1048,576-WORD BY16-BIT)
CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY
M5M29GB/T160BVP-80
Sep 1999. Rev2.0
SOFTWARE COMMAND DEFINITIONS
The device operations are selected by writing specific software
command into the Command User Interface.
Read Array Command
(FFH)
The device is in Read Array mode on initial device power up and
after exit from deep powerdown, or by writing FFH to the
Command User Interface. After starting the internal operation the
device is set to the read status register mode automatically.
Read Device Identifier Command
(90H)
It can normally read device identifier codes when Read Device
Identifier Code Command(90H) is written to the command latch.
Following the command write, the manufacturer code and the
device code can be read from address 00000H and 00001H,
respectively.
Read Status Register Command
(70H)
The Status Register is read after writing the Read Status Register
command of 70H to the Command User Interface. Also, after
starting the internal operation the device is set to the Read Status
Register mode automatically.
The contents of Status Register are latched on the later falling
edge of OE# or CE#. So CE# or OE# must be toggled every status
read.
Clear Status Register Command
(50H)
The Erase Status, Program Status and Block Status bits are set to
"1"s by the Write State Machine and can only be reset by the Clear
Status Register command of 50H. These bits indicates various
failure conditions.
Block Erase / Confirm Command
(20H/D0H)
Automated block erase is initiated by writing the Block Erase
command of 20H followed by the Confirm command of D0H. An
address within the block to be erased is required. The WSM
executes iterative erase pulse application and erase verify
operation.
Program
Commands
A)Word/Byte Program (40H)
Word/Byte program is executed by a two-command sequence.
The Word/Byte Program Setup command of 40H is written to the
Command Interface, followed by a second write specifying the
address and data to be written. The WSM controls the program
pulse application and verify operation. The Word/Byte Program
Command is Valid for only Bank(I).
DATA PROTECTION
The M5M29GB/T160BVP provides selectable block locking of
memory blocks. Each block has an associated nonvolatile lock-bit
which determines the lock status of the block. In addition, the
M5M29GB/T160BVP has a master Write Protect pin (WP#) which
prevents any modifications to memory blocks whose lock-bits are
set to "0", when WP# is low. When WP# is high, all blocks can be
programmed or erased regardless of the state of the lock-bits,
and the lock-bits are cleared to "1" by erase. See the BLOCK
LOCKING table on P.9 for details.
Power Supply Voltage
When the power supply voltage (Vcc) is less than V
LKO,
Low V
CC
Lock-Out voltage, the device is set to the Read-only mode.
Regarding DC electrical characteristics of V
LKO,
see P.10
A delay time of 2 us is required before any device operation is
initiated. The delay time is measured from the time Vcc reaches
Vccmin (2.7V).
During power up, RP#=GND is recommended. Falling in Busy
status is not recommended for possibility of damaging the device.
MEMORY ORGANIZATION
The M5M29GB/T160BVP has one 32Kbyte boot block, seven
32Kbyte parameter blocks, for Bank(I) and twenty-eight 64Kbyte
main blocks for Bank(II). A block is erased independently of other
blocks in the array.
Suspend/Resume Command
(B0H/D0H)
Writing the Suspend command of B0H during block erase
operation interrupts the block erase operation and allows read out
from another block of memory. Writing the Suspend command of
B0H during program operation interrupts the program operation
and allows read out from another block of memory. The Bank
address is required when writing the Suspend/Resume Command.
The device continues to output Status Register data when read,
after the Suspend command is written to it. Polling the WSM
Status and Suspend Status bits will determine when the erase
operation or program operation has been suspended. At this
point, writing of the Read Array command to the CUI enables
reading data from blocks other than that which is suspended.
When the Resume command of D0H is written to the CUI,
the WSM will continue with the erase or program processes.
4
B)Page Program for Data Blocks (41H)
Page Program for Bank(I) and Bank(II) allows fast programming of
128words/256bytes of data. Writing of 41H initiates the page
program operation for the Data area. From 2nd cycle to 257th
cycle (Byte Mode)129th cycle (Word Mode), write data must be
serially inputted. Address A6-A0,A-1 (Byte Mode) / A6-A0 (Word
Mode) have to be incremented from 00H to 7FH/FFH. After
completion of data loading, the WSM controls the program pulse
application and verify operation.
C)Single Data Load to Page Buffer (74H)
/ Page Buffer to Flash (0EH/D0H)
Single data load to the page buffer is performed by writing 74H
followed by a second write specifying the column address and
data. Distinct data up to 256byte/128word can be loaded to the
page buffer by this two-command sequence. On the other hand,
all of the loaded data to the page buffer is programed
simultaneously by writing Page Buffer to Flash command of 0EH
followed by the confirm command of D0H. After completion of
programing the data on the page buffer is cleared automatically.
This command is valid for only Bank(I) alike Word/Byte Program.
Clear Page Buffer Command
(55H)
Loaded data to the page buffer is cleared by writing the Clear
Page Buffer command of 55H followed by the Confirm command
of D0H. This command is valid for clearing data loaded by Single
Data Load to Page Buffer command.
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| M5M29GT160BVP | 16,777,216-BIT (2097,152-WORD BY 8-BIT / 1048,576-WORD BY16-BIT)CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY |
| M5M29GT160BVP-80 | 16,777,216-BIT (2097,152-WORD BY 8-BIT / 1048,576-WORD BY16-BIT)CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M29GB160BWG | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16,777,216-BIT (1048,576-WORD BY16-BIT) CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY |
| M5M29GB161BVP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16,777,216-BIT (1048,576-WORD BY16-BIT) CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY |
| M5M29GB161BWG | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16,777,216-BIT (1048,576-WORD BY16-BIT) CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY |
| M5M29GB320VP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:33,554,432-BIT (4,194,304-WORD BY 8-BIT / 2,097,152-WORD BY16-BIT) CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY |
| M5M29GB320VP-80 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:33,554,432-BIT (4,194,304-WORD BY 8-BIT / 2,097,152-WORD BY16-BIT) CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY |
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