參數(shù)資料
型號(hào): M58LW064BNF
廠商: 意法半導(dǎo)體
英文描述: 64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories
中文描述: 64兆位x16和x16/x32,塊擦除低壓閃存
文件頁數(shù): 8/53頁
文件大?。?/td> 319K
代理商: M58LW064BNF
M58LW064A, M58LW064B
8/53
BUS OPERATIONS
The following operations can be performed using
the appropriate bus configuration:
Asynchronous
– Read Array
– Read Electronic Signature
– Read Block Protection
– Read Status Register
– Read Query
– Write
– Output Disable
– Standby
– Reset/Power-down
Synchronous
– Address Latch
– Burst Read
– Burst Read Suspend
– Burst Read Interrupt
– Burst Read Resume
– Burst Address Advance
See Tables 3, 4, 5, 6 and 7.
COMMAND INTERFACE
Instructions, made up of Commands written in Cy-
cles, can be given tothe Program/Erase Controller
(P/E.C.) by writing to the Command Interface
(C.I.). At power-up or on exit from power down or
if V
DD
is lower than V
LKO
, the Command Interface
is resetto Read Array. Any incorrect commandwill
reset thedevice to Read Array. Anyimproper com-
mand sequence will cause the Status Register to
report the error condition and the device will de-
fault to Read Status Register.
The internal Program/Erase Controller (P/E.C.)
automatically handles all timing and verification of
the Program and Erase operations. The Status
Register information P/ECS on DQ7 can be read
at any time, during programming or erase, to mon-
itor the progress of the operation.
Table 3. Asynchronous Bus Operations
(1)
Note: 1. X = Don’t Care V
IL
or V
IH
. High = V
IH
or V
HH
.
2. = need to check with designers - X or V
IL
Operation
E
G
W
RP
L
DQ0-DQ31
Read Array
V
IL
V
IL
V
IH
High
X
Data Output
Read Electronic Signature or
Block Protection Status
V
IL
V
IL
V
IH
High
X
Manufacturer or Device Code
Output Block Protection Status
Read Status
P/E.C. Active
V
IL
V
IL
V
IH
High
X
Status Register Output
Read Query
V
IL
V
IL
V
IH
High
X
CFI Query Output
Write
V
IL
V
IH
V
IL
High
V
IL
Data Input
Output Disable
V
IL
V
IH
V
IH
High
X
High Z
Standby
V
IH
X
X
High
X
High Z
Reset/Power-down
X
X
X
V
IL
X
High Z
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