參數(shù)資料
型號(hào): M58LW064B150ZA1T
廠商: 意法半導(dǎo)體
英文描述: 64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories
中文描述: 64兆位x16和x16/x32,塊擦除低壓閃存
文件頁(yè)數(shù): 7/53頁(yè)
文件大?。?/td> 319K
代理商: M58LW064B150ZA1T
7/53
M58LW064A, M58LW064B
Figure 6. Memory Map
AI03228
1Mbit or
64 KWords
3FFFFFh
3F0000h
1Mbit or
64 KWords
01FFFFh
010000h
00FFFFh
1Mbit or
64 KWords
000000h
x64
1Mbit or
32 KDouble-Words
1FFFFFh
1F8000h
1Mbit or
32 KDouble-Words
00FFFFh
008000h
007FFFh
1Mbit or
32 KDouble-Words
000000h
x64
M58LW064A,
M58LW064B
Word (x16)
Organisation
Address lines A1-A22
M58LW064B
Double-Word (x32)
Organisation
Address lines
A2-A22
(A1 is Don’t Care)
ORGANISATION
Memory control isprovided by ChipEnable E,Out-
put Enable G and Write Enable W inputs. A Latch
Enable L input latches an address for both Read
and Write operations. The Burst Clock K and the
Burst Address Advance B inputs synchronize the
memory to the microprocessor during burst read.
Reset/Power-down RP is used to reset all the
memory circuitry, excluding the block protection
bits, andto setthechip indeeppowerdown mode.
Erase and Program operations are controlled by
an internal Program/Erase Controller (P/E.C.). A
Status Register data output on DQ7 provides a
Ready/Busy signal to indicate the state of the P/
E.C. operations. A Ready/Busy RB output also in-
dicates thecompletion of the internal algorithms. A
Valid Data Ready R output indicates the memory
data output valid status during the synchronous
burst mode operations.
A Word Organisation WORD input selects the x16
or x32data width for the M58LW064B. For the x16
only organisation of the M58LW064A or the x16
organisation of the M58LW064B theaddress lines
are A1-A22 and the Data Input/Output is on DQ0-
DQ15.
For
the
x32
M58LW064B the address lines are A2-A22 and
the Data Input/Output is DQ0-DQ31.
organisation
of
the
MEMORY BLOCKS
The device has a uniform block architecture with
an array of 64 separate blocks of 1Mbit each. The
memory features a software erase suspend of a
block allowing read or programming within any
other block. A suspended erase operation can be
resumed to complete block erasure. A program
suspend operation on a block allows reading only
within any other block. A suspend program opera-
tion can be resumed to complete programming. At
any moment of the sequence the Status Register
indicates the status of the operation.
Each block is erased separately. An Erase or Pro-
gram operation is managed automatically by the
P/E.C. Individualblock protection against Program
or Erase provides additional data security. All
blocks are protected during power-up. A software
instruction is provided to cancel all block protec-
tion bits simultaneously in an application and a
higher level input on RP can temporarily disable
the protection mechanism. A software instruction
is provided to allow protection of some or all of the
blocks in an application. All Program or Erase op-
erations are blocked when the Program/Erase En-
able input V
PP
is Low.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M58LW064B150ZA6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories
M58LW064BNF 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories
M58LW064BNH 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories
M58LW064BT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories
M58LW064BZA 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories