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參數(shù)資料
| 型號(hào)： | M58LW032C90N1E |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 32 Mbit 2Mb x16, Uniform Block, Burst 3V Supply Flash Memory |
| 中文描述： | 32兆位的2Mb x16插槽，統(tǒng)一座，突發(fā)3V電源快閃記憶體 |
| 文件頁數(shù)： | 12/61頁 |
| 文件大?。?/td> | 845K |
| 代理商： | M58LW032C90N1E |
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M58LW032C
12/61
dicates that the data is not, or will not be valid. Val-
id Data Ready in a high-impedance state indicates
that valid data is or will be available.
Unless Synchronous Burst Read has been select-
ed, Valid Data Ready is high-impedance. It may be
tied to other components with the same Valid Data
Ready signal to create a unique System Ready
signal.
The Valid Data Ready, R, output has an internal
pull-up resistor of approximately 1 M
powered
from V
DDQ
, designers should use an external pull-
up resistor of the correct value to meet the external
timing requirements for Valid Data Ready rising.
Refer to Figure 19.
Status/(Ready/Busy) (STS).
The STS signal is
an open drain output that can be used to identify
the Program/Erase Controller status. It can be
configured in two modes:
I
Ready/Busy - the pin is Low, V
OL
, during
Program and Erase operations and high
impedance when the memory is ready for any
Read, Program or Erase operation.
I
Status - the pin gives a pulsing signal to indicate
the end of a Program or Block Erase operation.
After power-up or reset the STS pin is configured
in Ready/Busy mode. The pin can be configured
for Status mode using the Configure STS com-
mand.
When the Program/Erase Controller is idle, or sus-
pended, STS can float High through a pull-up re-
sistor. The use of an open-drain output allows the
STS pins from several memories to be connected
to a single pull-up resistor (a Low will indicate that
one, or more, of the memories is busy).
STS is not Low during a reset unless the reset was
applied when the Program/Erase controller was
active. Ready/Busy can rise before Reset/Power-
Down rises.
Program/Erase Enable (V
PEN
).
The
Erase Enable input, V
PEN,
is used to protect all
blocks, preventing Program and Erase operations
from affecting their data.
Program/Erase Enable must be kept High during
all Program/Erase Controller operations, other-
wise the operations is not guaranteed to succeed
and data may become corrupt.
V
DD
Supply Voltage.
V
DD
provides the power
supply to the internal core of the memory device.
It is the main power supply for all operations
(Read, Program and Erase).
V
DDQ
Supply Voltage.
V
DDQ
provides the power
supply to the I/O pins and enables all Outputs to
be powered independently from V
DD
. V
DDQ
can be
tied to V
DD
or can use a separate supply.
It is recommended to power-up and power-down
V
DD
and V
DDQ
together to avoid any condition that
would result in data corruption.
V
SS
Ground.
Ground, V
SS,
is the reference for
the core power supply. It must be connected to the
system ground.
V
SSQ
Ground.
V
SSQ
ground is the reference for
the input/output circuitry driven by V
DDQ
. V
SSQ
must be connected to V
SS
.
Note: Each device in a system should have
V
DD
and
V
DDQ
decoupled with a 0.1μF ceramic
capacitor close to the pin (high frequency, in-
herently low inductance capacitors should be
as close as possible to the package). See Fig-
ure 10, AC Measurement Load Circuit.
Program/
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M58LW032C90N1F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Uniform Block, Burst 3V Supply Flash Memory |
| M58LW032C90N1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Uniform Block, Burst 3V Supply Flash Memory |
| M58LW032C90N6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Uniform Block, Burst 3V Supply Flash Memory |
| M58LW032C90N6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Uniform Block, Burst 3V Supply Flash Memory |
| M58LW032C90N6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Uniform Block, Burst 3V Supply Flash Memory |
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