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參數(shù)資料
| 型號： | M54HC74 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR |
| 中文描述： | 雙D型觸發(fā)器與預(yù)置和清除 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 250K |
| 代理商： | M54HC74 |
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Symbol
Parameter
Test Conditions
Value
-40 to 85
o
C
74HC
Min.
Unit
V
CC
(V)
T
A
= 25
o
C
54HC and 74HC
Min.
Typ.
30
-55 to 125
o
C
54HC
Min.
Max.
75
15
13
150
30
26
150
30
26
Max.
95
19
16
190
38
32
190
38
32
Max.
110
22
19
225
45
38
225
45
38
t
TLH
t
THL
Output Transition
Time
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
ns
8
7
t
PLH
t
PHL
Propagation
Delay Time
(CLOCK - Q)
48
16
13
51
17
15
21
63
67
18
6
6
21
7
6
15
4
3
ns
t
PLH
t
PHL
Propagation
Delay Time
(CL, PR - Q)
ns
f
MAX
Maximum Clock
Frequency
6.2
31
37
5
4.2
21
25
MHz
25
30
t
W(H)
t
W(L)
Minimum Pulse
Width
(CLOCK)
75
15
13
75
15
13
75
15
13
0
0
0
25
5
4
10
95
19
16
95
19
16
95
19
16
0
0
0
30
6
5
10
110
22
19
110
22
19
110
22
19
0
0
0
35
7
6
10
ns
t
W(L)
Minimum Pulse
Width
(CL, PR)
ns
t
s
Minimum Set-up
Time
ns
t
h
Minimum Hold
Time
ns
t
REM
Minimum
Removal Time
(CL, PR)
0
0
0
5
ns
C
IN
Input Capacitance
Power Dissipation
Capacitance
pF
C
PD
(*)
34
pF
(*) C
PD
isdefined asthe value ofthe IC’sinternal equivalent capactance which is calculated from the operating current consumption without load.
(Refer to Test Circuit).Average operting current can be obtained by thefollowingequation. I
CC
(opr) = C
PD
V
CC
f
IN
+ I
CC
/2(per FLIP/FLOP)
M54/M74HC74
5/11
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PDF描述 |
|---|---|
| M54HC75 | 4 BIT D TYPE LATCH |
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| M54HC75D1 | RAD HARD 4 BIT D TYPE LATCH |
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| M54HC75K1 | RAD HARD 4 BIT D TYPE LATCH |
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| M54HCT244K1 | 制造商:STMicroelectronics 功能描述: |
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