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參數(shù)資料
| 型號： | M54HC40102 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS |
| 中文描述： | 8階段預(yù)置同步向下計(jì)數(shù)器 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 300K |
| 代理商： | M54HC40102 |
The HC40102 and HC40103 are 8-stage preset-
table synchronous down counters. Carry Out/Zero
Detect (CO/ZD) is output at the ”L” level for the
period of 1 bit when the readout becomes ”0”. The
HC40102 adopts binary coded decimal notation,
making setting up to 99 counts possible. While the
HC40103adopts8-bitbinary counterand cansetup
to 255 counts.
COUNT OPERATION
At the ”H” level of control input of CLEAR, SPE and
APE, the counter carriers out down count operation
onebyoneattherise ofpulsegiventoCLOCKinput.
Count operation can be inhibited by setting Carry
Input/Clock EnableCI/CE to the”H” level.
CO/ZD is output at the ”L” level when the readout
becomes ”0” but is not output even if the readout
becomes ”0” when CI/CE is at the ”H” level, thus
maintaining the ”H” level.
Synchronous cascade operation can be carried out
by using CI/CE input and CO/ZD output.
The contents of count jump to maximum count (99
for the HC40102 and225 for theHC40103) if clock
is given when the readout is ”0”. Therefore, oper-
ation of 100-frequency division and that of 256-fre-
quencydivisionare carried outfortheHC40102 and
HC40103, respectively, when clock input alone is
given without various kinds of preset operation.
PRESETOPERATION AND RESETOPERATION
WhenClear(CLEAR) input is settothe”L” level,the
readout is set to the maximum count independetly
of other inputs. When Asynchronous Preset Enable
(APE)input is set to the”L” level,readouts givenon
J0 toJ7canbe preset asynchronously tocounter in-
dependently of inputs other than CLEAR input.
When Synchronous Preset Enable (SPE) is set to
the ”L” level, the readouts given on J0 to J7 can be
preset to counter synchronously with the rise of
clock.
As totheseoperation modes,refer to the truthtable.
FUNCTIONAL DESCRIPTION
Input
Output
Q
n
+ 1
L
L
H
L
H
Q
n
__
Q
n
CLEAR APE SPE J
L
X
H
L
H
L
H
H
H
H
H
H
TE CLOCK
X
X
X
X
X
X
X
X
X
L
L
L
X
L
H
L
H
X
X
X
X
_
L
_
_
L
_
M
_
_
L
_
X
_
H
H
H
H
H
H
X
X
L
H
M54/M74HC40102/40103
7/14
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| M54HC40102B1R | 8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS |
| M54HC40102C1R | 8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS |
| M54HC40102F1R | 8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS |
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相關(guān)代理商/技術(shù)參數(shù) |
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| M54HC40102B1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS |
| M54HC40102C1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS |
| M54HC40102F1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS |
| M54HC40102M1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS |
| M54HC40103 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS |
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