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參數(shù)資料
| 型號： | M50LPW041K1T |
| 廠商： | 意法半導體 |
| 英文描述： | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| 中文描述： | 4兆位512KB的× 8，統(tǒng)一座3V電源低引腳數(shù)快閃記憶體 |
| 文件頁數(shù)： | 11/37頁 |
| 文件大小： | 268K |
| 代理商： | M50LPW041K1T |
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M50LPW041
Register for details on the definitions of the Status
Register bits.
If the address falls in a protected block then the
Program operation will abort, the data in the
memory array will not be changed and the Status
Register will output the error.
During the Program operation the memory will
only accept the Read Status Register command
and the Program/Erase Suspend command. All
other commands will be ignored. Typical Program
times are given in Table 13.
Note that the Program command cannot change a
bit set at ‘0’ back to ‘1’ and attempting to do so will
not cause any modification on its value. One of the
Erase commands must be used to set all of the
bits in the block to ‘1’.
See Figure 14, Program Flowchart and Pseudo
Code, for a suggested flowchart on using the
Program command.
Quadruple Byte Program Command.
The Qua-
druple Byte Program Command can be only used
in A/A Mux mode to program four adjacent bytes
in the memory array at a time. The four bytes must
differ only for the addresses A0 and A1.
Programming should not be attempted when V
PP
is not at V
PPH
. The operation can also be executed
if V
PP
is below V
PPH
, but result could be uncertain.
Five Bus Write operations are required to issue the
command. The second, the third and the fourth
Bus Write cycle latches respectively the address
and data of the first, the second and the third byte
in the internal state machine. The fifth Bus Write
cycle latches the address and data of the fourth
byte in the internal state machine and starts the
Program/Erase Controller. Once the command is
issued subsequent Bus Read operations read the
Status Register. See the section on the Status
Register for details on the definitions of the Status
Register bits.
During the Quadruple Byte Program operation the
memory will only accept the Read Status register
command and the Program/Erase Suspend com-
mand. All other commands will be ignored. Typical
Quadruple Byte Program times are given in Table
13.
Note that the Quadruple Byte Program command
cannot change a bit set to ‘0’ back to ‘1’ and
attempting to do so will not cause any modification
on its value. One of the Erase commands must be
used to set all of the bits in the block to ‘1’.
See Figure 15, Quadruple Byte Program Flow-
chart and Pseudo Code, for a suggested flowchart
on using the Quadruple Byte Program command.
Chip Erase Command.
The Chip Erase Com-
mand can be only used in A/A Mux mode to erase
the entire chip at a time. Erasing should not be at-
tempted when V
PP
is not at V
PPH
. The operation
can also be executed if V
PP
is below V
PPH
, but re-
sult could be uncertain. Two Bus Write operations
are required to issue the command and start the
Program/Erase Controller. Once the command is
issued subsequent Bus Read operations read the
Status Register. See the section on the Status
Register for details on the definitions of the Status
Register bits. During the Chip Erase operation the
memory will only accept the Read Status Register
command. All other commands will be ignored.
Typical Chip Erase times are given in Table 13.
The Chip Erase command sets all of the bits in the
memory to ‘1’. See Figure 17, Chip Erase Flow-
chart and Pseudo Code, for a suggested flowchart
on using the Chip Erase command.
Table 9. A/A Mux Bus Operations
Table 10. Manufacturer and Device Codes
Operation
G
W
RP
V
PP
DQ7-DQ0
Bus Read
V
IL
V
IH
V
IH
Don’t Care
Data Output
Bus Write
V
IH
V
IL
V
IH
Float or V
CC
or V
PPH
Data Input
Output Disable
V
IH
V
IH
V
IH
Don’t Care
Hi-Z
Reset
V
IL
or V
IH
V
IL
or V
IH
V
IL
Don’t Care
Hi-Z
Operation
G
W
RP
A18-A1
A0
DQ7-DQ0
Manufacturer Code
V
IL
V
IH
V
IH
V
IL
V
IL
20h
Device Code
V
IL
V
IH
V
IH
V
IL
V
IH
3Ch
相關PDF資料 |
PDF描述 |
|---|---|
| M50LPW041N1T | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041N | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041K | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041 | 4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW080N1TG | 8 Mbit 1Mb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M50LPW041N | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW041N1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW080 | 制造商:STMicroelectronics 功能描述: |
| M50LPW080K | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit 1Mb x8, Uniform Block 3V Supply Low Pin Count Flash Memory |
| M50LPW080K1 | 功能描述:閃存 3.6V 8M (1Mx8) RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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