![](http://datasheet.mmic.net.cn/330000/M50FW080K5P_datasheet_16433094/M50FW080K5P_52.png)
Flowcharts and pseudo codes
M50FW080
52/55
Figure 21.
Chip Erase flowchart and pseudo code (A/A Mux interface only)
1.
If an error is found, the Status Register must be cleared before further Program/Erase Controller
operations.
Write 80h
AI08428B
Start
Write 10h
Read Status
Register
YES
NO
SR7 = 1
YES
NO
SR3 = 0
NO
SR4, SR5 = 0
VPP Invalid
Error (1)
Command
Sequence Error (1)
Chip Erase command:
– write 80h
– write 10h
(memory enters read Status Register after
the Chip Erase command)
do:
– read Status Register
while SR7 = 0
If SR3 = 1, VPP invalid error:
– error handler
If SR4, SR5 = 1, Command sequence error:
– error handler
YES
NO
SR5 = 0
Erase Error (1)
If SR5 = 1, Erase error:
– error handler
End
YES