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參數(shù)資料
| 型號(hào)： | M50FLW080AN5P |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory |
| 中文描述： | 8兆位（13 × 64KB之座3 × 16 × 4KB的部門），3V電源固件集線器/低引腳數(shù)快閃記憶體 |
| 文件頁數(shù)： | 36/64頁 |
| 文件大?。?/td> | 341K |
| 代理商： | M50FLW080AN5P |
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Firmware Hub/low-pin-count (FWH/LPC) interface Configuration Registers
M50FLW080A,
36/64
6.1.3
Lock Down
The Lock Down Bit provides a mechanism for protecting software data from simple hacking
and malicious attack. When the Lock Down Bit is set, ‘1’, further modification to the Write
Lock, Read Lock and Lock Down Bits cannot be performed. A reset, or power-up, is required
before changes to these bits can be made. When the Lock Down Bit is reset, ‘0’, the Write
Lock, Read Lock and Lock Down Bits can be changed.
Table 15.
1.
In LPC mode, a most significant nibble, F, must be added to the memory address. For all registers, A22=0,
and the remaining address bits should be set according to the rules shown in the ADDR field of
Table 6
to
Table 9
.
Table 16.
Configuration Register map
Mnemonic
Register Name
Memory
Address
Default
Value
Access
Lock Registers (For details, see
Appendix A
)
GPI_REG
Firmware Hub/Low Pin Count (FWH/LPC)
General Purpose Input Register
FBC0100h
N/A
R
MANU_REG
Manufacturer Code Register
FBC0000h
20h
R
Lock Register bit definitions
Bit
Bit Name
Value
Function
(1)
1.
Applies to the registers that are defined in
Table 34
and
Table 35
.
7-3
Reserved
2
Read-Lock
‘1’
Bus Read operations in this Block or Sector always return 00h.
‘0’
Bus read operations in this Block or Sector return the Memory Array
contents. (Default value).
1
Lock-Down
‘1’
Changes to the Read-Lock bit and the Write-Lock bit cannot be
performed. Once a ‘1’ is written to the Lock-Down bit it cannot be
cleared to ‘0’; the bit is always reset to ‘0’ following a Reset (using RP
or INIT) or after power-up.
‘0’
Read-Lock and Write-Lock can be changed by writing new values to
them. (Default value).
0
Write-Lock
‘1’
Program and Erase operations in this Block or Sector will set an error
in the Status Register. The memory contents will not be changed.
(Default value).
‘0’
Program and Erase operations in this Block or Sector are executed
and will modify the Block or Sector contents.
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PDF描述 |
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| M50FLW080AN5TP | 8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M50FLW080AN5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory |
| M50FLW080AN5TG | 功能描述:IC FLASH 8MBIT 33MHZ 40TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| M50FLW080AN5TP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory |
| M50FLW080ANB5 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory |
| M50FLW080ANB5G | 功能描述:閃存 8Mbit 3V Firmwre Hub Low pin-count flash RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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