參數(shù)資料
型號： M4A5-96/48-10VNI
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 61/62頁
文件大?。?/td> 0K
描述： IC CPLD 96MACRO 100TQFP
標(biāo)準(zhǔn)包裝： 90
系列： ispMACH® 4A
可編程類型： 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1)： 10.0ns
電壓電源 - 內(nèi)部： 4.5 V ~ 5.5 V
宏單元數(shù)： 64
輸入/輸出數(shù)： 48
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-TQFP（14x14）
包裝： 托盤
8
ispMACH 4A Family
Table 6. Logic Allocator for All ispMACH 4A Devices (except M4A(3,5)-32/32)
Output Macrocell
Available Clusters
Output Macrocell
Available Clusters
M0
C0, C1, C2
M8
C7, C8, C9, C10
M1
C0, C1, C2, C3
M9
C8, C9, C10, C11
M2
C1, C2, C3, C4
M10
C9, C10, C11, C12
M3
C2, C3, C4, C5
M11
C10, C11, C12, C13
M4
C3, C4, C5, C6
M12
C11, C12, C13, C14
M5
C4, C5, C6, C7
M13
C12, C13, C14, C15
M6
C5, C6, C7, C8
M14
C13, C14, C15
M7
C6, C7, C8, C9
M15
C14, C15
Table 7. Logic Allocator for M4A(3,5)-32/32
Output Macrocell
Available Clusters
Output Macrocell
Available Clusters
M0
C0, C1, C2
M8
C8, C9, C10
M1
C0, C1, C2, C3
M9
C8, C9, C10, C11
M2
C1, C2, C3, C4
M10
C9, C10, C11, C12
M3
C2, C3, C4, C5
M11
C10, C11, C12, C13
M4
C3, C4, C5, C6
M12
C11, C12, C13, C14
M5
C4, C5, C6, C7
M13
C12, C13, C14, C15
M6
C5, C6, C7
M14
C13, C14, C15
M7
C6, C7
M15
C14, C15
0 Default
Prog. Polarity
To
n-1
To
n-2
From
n-1
To
n+1
From
n+1
From
n+2
Basic Product
Term Cluster
Extra
Product
Term
Logic Allocator
n
To
Macrocell
n
0 Default
Prog. Polarity
To
n-1
To
n-2
From
n-1
To
n+1
From
n+1
From
n+2
Basic Product
Term Cluster
Extra
Product
Term
Logic Allocator
nn
To
Macrocell
n
17466G-006
Figure 2. Logic Allocator: Conguration of Cluster “n” Set by Mode of Macrocell “n”
17466G-005
a. Synchronous Mode
b. Asynchronous Mode
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