參數(shù)資料
型號: M48TY-85MH1TR
廠商: 意法半導(dǎo)體
英文描述: 3.3V-5V TIMEKEEPER CONTROLLER
中文描述: 3.3 - 5V的計時控制器
文件頁數(shù): 8/33頁
文件大小: 477K
代理商: M48TY-85MH1TR
M48T201Y, M48T201V
8/33
READ Mode
The M48T201Y/V executes a READ Cycle when-
ever W (WRITE Enable) is high and E (Chip En-
able) is low. The unique address specified by the
address inputs (A0-A18) defines which one of the
on-chip TIMEKEEPER
registers or external
SRAM locations is to be accessed. When the ad-
dress presented to the M48T201Y/V is in the
range of 7FFFFh-7FFF0h, one of the on-board
TIMEKEEPER registers is accessed and valid
data will be available to the eight data output driv-
ers within t
AVQV
after the address input signal is
stable, providing that the E and G access times
are also satisfied. If they are not, then data access
must be measured from the latter occurring signal
(E or G) and the limiting parameter is either t
ELQV
for E or t
GLQV
for G rather than the address access
time. When one of the on-chip TIMEKEEPER reg-
isters is selected for READ, the G
CON
signal will
remain inactive throughout the READ Cycle.
When the address value presented to the
M48T201Y/V is outside the range of TIMEKEEP-
ER registers, an external SRAM location will be
selected. In this case the G signal will be passed
to the G
CON
pin, with the specified delay times of
t
AOEL
or t
OERL
.
Figure 5. G
CON
Timing When Switching Between RTC and External SRAM
AI02333
G
E
GCON
tAOEL
ADDRESS
00000h - 7FFEFh
7FFF0h - 7FFFFh
00000h - 7FFEFh
7FFF0h - 7FFFFh
tAOEH
tOERL
tRO
External SRAM
RTC
External SRAM
RTC
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M48TY-85PM1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM
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