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參數(shù)資料
| 型號： | M48T59V-70MH6 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時鐘/數(shù)據(jù)恢復及定時提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.330 INCH, PLASTIC, SOH-28 |
| 文件頁數(shù)： | 26/29頁 |
| 文件大小： | 440K |
| 代理商： | M48T59V-70MH6 |
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M48T59, M48T59Y, M48T59V*
6/29
OPERATION MODES
As Figure 6, page 5 shows, the static memory ar-
ray and the quartz-controlled clock oscillator of the
M48T59/Y/V are integrated on one silicon chip.
The two circuits are interconnected at the upper
eight memory locations to provide user accessible
BYTEWIDE clock information in the bytes with
addresses 1FF8h-1FFFh. The clock locations
contain the century, year, month, date, day, hour,
minute, and second in 24 hour BCD format (except
for the century). Corrections for 28, 29 (leap year -
valid until 2100), 30, and 31 day months are made
automatically. Byte 1FF8h is the clock control reg-
ister. This byte controls user access to the clock
information and also stores the clock calibration
setting.
The eight clock bytes are not the actual clock
counters themselves; they are memory locations
consisting of BiPORT READ/WRITE memory
cells. The M48T59/Y/V includes a clock control cir-
cuit which updates the clock bytes with current in-
formation once per second. The information can
be accessed by the user in the same manner as
any other location in the static memory array.
The M48T59/Y/V also has its own Power-fail De-
tect circuit. The control circuitry constantly moni-
tors the single 5V/3.3V supply for an out of
tolerance condition. When VCC is out of tolerance,
the circuit write protects the SRAM, providing a
high degree of data security in the midst of unpre-
dictable system operation brought on by low VCC.
As VCC falls below the Battery Back-up Switchover
Voltage (VSO), the control circuitry connects the
battery which maintains data and clock operation
until valid power returns.
Table 2. Operating Modes
Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage.
1. See Table 13, page 22 for details.
Mode
VCC
E
G
W
DQ7-DQ0
Power
Deselect
4.75 to 5.5V
or
4.5 to 5.5V
or
3.0 to 3.6V
VIH
X
High Z
Standby
WRITE
VIL
X
VIL
DIN
Active
READ
VIL
VIH
DOUT
Active
READ
VIL
VIH
High Z
Active
Deselect
VSO to VPFD (min)
(1)
X
High Z
CMOS Standby
Deselect
≤ VSO(1)
X
High Z
Battery Back-up Mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M48T59V-70MH6E | REAL TIME CLOCK, PDSO28 |
| M48T59V-70MH6TR | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M48T59Y-70MH6F | REAL TIME CLOCK, PDSO28 |
| M48T86MH1E | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M4T32-BR12SH1 | 1 TIMER(S), REAL TIME CLOCK, DSS4 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T59V-70MH6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x8 TIMEKEEPER SRAM |
| M48T59V-70PC1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER? SRAM |
| M48T59V-70PC1E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER? SRAM |
| M48T59V-70PC1F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER? SRAM |
| M48T59V-70PC1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Kbit 8Kb x8 TIMEKEEPER SRAM |
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