參數(shù)資料
型號(hào): M48T02-150PC1
廠商: STMICROELECTRONICS
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDIP24
封裝: 0.600 INCH, ROHS COMPLIANT, PLASTIC, DIP-24
文件頁(yè)數(shù): 24/25頁(yè)
文件大?。?/td> 199K
代理商: M48T02-150PC1
Operation modes
M48T02, M48T12
The state of the eight three-state data I/O signals is controlled by E and G. If the outputs are
activated before tAVQV, the data lines will be driven to an indeterminate state until tAVQV. If
the address inputs are changed while E and G remain active, output data will remain valid
for output data hold time (tAXQX) but will go indeterminate until the next address access.
Figure 4.
Read mode AC waveforms
Note:
WRITE enable (W) = High.
Table 3.
Read mode AC characteristics
Symbol
Parameter(1)
1.
Valid for ambient operating temperature: TA = 0 to 70°C; VCC = 4.75 to 5.5 V or 4.5 to 5.5 V (except where noted).
M48T02/M48T12
Unit
–70
–150
–200
Min
Max
Min
Max
Min
Max
tAVAV
READ cycle time
70
150
200
ns
tAVQV
Address valid to output valid
70
150
200
ns
tELQV
Chip enable low to output valid
70
150
200
ns
tGLQV
Output enable low to output valid
35
75
80
ns
tELQX
Chip enable low to output transition
5
10
ns
tGLQX
Output enable low to output transition
5
ns
tEHQZ
Chip enable high to output Hi-Z
25
35
40
ns
tGHQZ
Output enable high to output Hi-Z
25
35
40
ns
tAXQX
Address transition to output transition
10
5
ns
AI01330
tAVAV
tAVQV
tAXQX
tELQV
tELQX
tEHQZ
tGLQV
tGLQX
tGHQZ
VALID
A0-A10
E
G
DQ0-DQ7
VALID
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