參數(shù)資料
型號: M48ST59W-70MH1TR
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復(fù)及定時提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO44
封裝: 0.330 INCH, SNAPHAT, PLASTIC, SOH-44
文件頁數(shù): 29/29頁
文件大?。?/td> 158K
代理商: M48ST59W-70MH1TR
9/29
M48ST59W
OPERATING MODES
The static memory array and the quartz-controlled
clock oscillator of the M48ST59W are integrated
on one silicon chip (see Figure 4, page 5). The
memory locations used to provide user accessible
BYTEWIDE
clock information are in the bytes
with addresses 1FFFh-1FF9h (see Table 11, page
16). These clock locations contain the century,
year, month, date, day, hour, minute, and second
in 24 hour, BCD format. Corrections for 28, 29
(leap year - compliant until the year 2100), 30, and
31 day months are made automatically.
Byte 1FF8h is the clock control register. This byte
controls user access to the clock information and
also stores the clock calibration setting.
The eight clock bytes are not the actual clock
counters themselves; they are memory locations
consisting of BiPORT
READ/WRITE memory
cells. The M48ST59W includes a clock control cir-
cuit which updates the clock bytes with current in-
formation approximately once per second. The
information can be accessed by the user in the
same manner as any other location in the static
memory array.
The M48ST59W also has its own Power-fail De-
tect circuit. The control circuitry constantly moni-
tors the single VCC supply for an out of tolerance
condition. When VCC is out of tolerance, the circuit
writes protects the SRAM, providing a high degree
of data security in the midst of unpredictable sys-
tem operation brought on by low VCC.As VCC falls
below the Battery Back-up Switchover Voltage,
(VSO), the control circuitry connects the battery
which maintains data and clock operation until val-
id power returns.
Table 6. Operating Modes
Note: X = VIH or VIL;VSO = Battery Back-up Swit chover Voltage.
1. See Table 9, page 14.
Symbol
VCC
E
G
W
DQ7 – DQ0
Power
Deselect
2.7 to 3.6V
VIH
X
Hi-Z
Standby
WRITE
VIL
X
VIL
DIN
Active
READ
VIL
VIH
DOUT
Active
READ
VIL
VIH
Hi-Z
Active
Deselect
VSO to VPFD (min)
(1)
X
Hi-Z
CMOS Standby
Deselect
≤ VSO(1)
X
Hi-Z
Batter y Back-up Mode
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