參數(shù)資料
型號： M44C092-V
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝： SSO-20
文件頁數(shù)： 39/80頁
文件大?。?/td> 609K
代理商： M44C092-V
M44C092–V
Rev. A2, 08-Nov-01
44 (80)
Timer 3 – Mode 2: Timer/Counter, Ext. Trigger Restart & Ext. Capture (with T3I Input)
The counter is driven by an internal clock source. After starting with T3R, the first edge from the external input T3I
starts the counter. The following edges at T3I load the current counter value into the capture register, reset the counter
and restart it. The edge can be selected by the programmable edge decoder of the timer input stage. If single-action
mode is activated for one or both compare registers the trigger signal restarts the single action.
00000000123456
Counter 3
T3EX
CM31
CM32
13813
789 10 012 X X X 0123456789 10 012 X X
T3R
XX
T3O
Figure 49. Externally triggered counter reset and start combined with single-action mode
Timer 3 – Mode 3: Timer/Counter, Int. Trigger Restart & Int. Capture (with TOG2)
The counter is driven by an internal or external (T3I) clock source. The output toggle signal of Timer 2 resets the
counter. The counter value before the reset is saved in the capture register. If single-action mode is activated for one
ore both compare registers, the trigger signal restarts the single actions. This mode can be used for frequency measure-
ments or as event counter with time gate (see combination mode 10).
00123456789 10
Counter 3
TOG2
T3CP–
Register
13814
11
0 1
2
40 1
T3I
2
3
T3R
Capture value = 0
Capture value = 11
Capture
value = 4
Figure 50. Event counter with time gate
Timer 3 – Mode 4: Timer/Counter
The timer runs as timer/counter in mode 1, but its output T3O is used as output for the Timer 2 output signal.
Timer 3 – Mode 5: Timer/Counter, Ext. Trigger Restart & Ext. Capture (with T3I Input)
The Timer 3 runs as timer/counter in mode 2, but its output T3O is used as output for the Timer 2 output signal.
Timer 3 Modulator / Demodulator Modes
Timer 3 – Mode 6: Carrier Frequency Burst Modulation Controlled by Timer 2 Output Toggle Flip-Flop (M2)
The Timer 3 counter is driven by an internal or external clock source. Its compare– and compare mode registers must
be programmed to generate the carrier frequency via the output toggle flip-flop. The output toggle flip-flop of Timer 2
is used to enable or disable the Timer 3 output. Timer 2 can be driven by the toggle output signal of Timer 3 or any
other clock source. (see combination mode 11)
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