參數(shù)資料
型號(hào): M44C092-H
廠商: ATMEL CORP
元件分類(lèi): 微控制器/微處理器
英文描述: 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝: SSO-20
文件頁(yè)數(shù): 60/84頁(yè)
文件大?。?/td> 648K
代理商: M44C092-H
M44C892–H
M44C892–H
M44C092–H
Rev. A2, 14-Dec-01
63 (84)
Combination mode 4: Manchester modulation 2
SSI mode 1:
8-bit shift register internal data output (SO) to the Timer 2 modulator stage
Timer 2 mode 3:
8-bit compare counter and 4-bit prescaler
Timer 2 output mode 5:
The modulator 2 of Timer 2 modulates the SSI data output to Manchester code
The 4 bit stage can be used as prescaler for the SSI to generate the stop signal for modulator 2. The SSI has a special
mode to supply the prescaler with the shiftclock. The control output signal (OMSK) of the SSI is used as stop signal
for the modulator. This is an example for a 12-bit Manchester telegram:
00
000
0
1
2
3
4
0
1
2
0
Counter 2/1 = Compare Register 2/1 (= 4)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
SCLI
Buffer full
SIR
SO
SC
MSM
Timer 2
Mode 3
SCL
Counter 2/1
OMSK
T2O
13837
3
Figure 72. Manchester modulation 2
Combination mode 5: Biphase modulation 2
SSI mode 1:
8-bit shift register internal data output (SO) to the Timer 2 modulator stage
Timer 2 mode 3:
8-bit compare counter and 4-bit prescaler
Timer 2 output mode 4:
The modulator 2 of Timer 2 modulates the SSI data output to Biphase code
The 4-bit stage can be used as prescaler for the SSI to generate the stop signal for modulator 2. The SSI has a special
mode to supply the prescaler via the shift-clock. The control output signal (OMSK) of the SSI is used as stop signal
for the modulator. This is an example for a 13-bit Biphase telegram:
0
000
0
1
2
3
4
5
0
Counter 2/1 = Compare Register 2/1 (= 5)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
SCLI
Buffer full
SIR
SO
SC
MSM
Timer 2
Mode 3
SCL
Counter 2/1
OMSK
T2O
13838
01
2
Figure 73. Biphase modulation
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