參數(shù)資料
型號(hào): M41T56BN6
廠商: STMICROELECTRONICS
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDIP8
封裝: PLASTIC, DIP-8
文件頁(yè)數(shù): 2/24頁(yè)
文件大小: 163K
代理商: M41T56BN6
M41T56
10/24
Table 7. AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5V (except where noted).
2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max.) of the falling edge of SCL.
READ Mode
In this mode, the master reads the M41T56 slave
after setting the slave address (see Figure 12 and
Figure 13, page 11). Following the WRITE Mode
Control Bit (R/W = 0) and the Acknowledge Bit, the
word address An is written to the on-chip address
pointer. Next the START condition and slave ad-
dress are repeated, followed by the READ Mode
Control Bit (R/W = 1). At this point, the master
transmitter becomes the master receiver. The data
byte which was addressed will be transmitted and
the master receiver will send an Acknowledge Bit
to the slave transmitter. The address pointer is
only incremented on reception of an Acknowledge
Bit. The M41T56 slave transmitter will now place
the data byte at address An + 1 on the bus. The
master receiver reads and acknowledges the new
byte and the address pointer is incremented to An
+ 2. This cycle of reading consecutive addresses
will continue until the master receiver sends a
STOP condition to the slave transmitter.
An alternate READ Mode may also be implement-
ed, whereby the master reads the M41T56 slave
without first writing to the (volatile) address point-
er. The first address that is read is the last one
stored in the pointer, see Figure 14, page 11.
Figure 12. Slave Address Location
Symbol
Parameter(1)
Min
Max
Unit
fSCL
SCL Clock Frequency
0
100
kHz
tLOW
Clock Low Period
4.7
s
tHIGH
Clock High Period
4
s
tR
SDA and SCL Rise Time
1
s
tF
SDA and SCL Fall Time
300
ns
tHD:STA
START Condition Hold Time
(after this period the first clock pulse is generated)
4s
tSU:STA
START Condition Setup Time
(only relevant for a repeated start condition)
4.7
s
tSU:DAT
Data Setup Time
250
ns
tHD:DAT
(2)
Data Hold Time
0
s
tSU:STO
STOP Condition Setup Time
4.7
s
tBUF
Time the bus must be free before a new transmission can start
4.7
s
AI00602
R/W
SLAVE ADDRESS
START
A
0
100
0
11
MSB
LSB
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