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參數(shù)資料
| 型號(hào)： | M41T50Q6F |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, QCC16 |
| 封裝： | 3 X 3 MM, LEAD FREE, QFN-16 |
| 文件頁數(shù)： | 5/23頁 |
| 文件大?。?/td> | 288K |
| 代理商： | M41T50Q6F |
13/23
M41T50
Setting Alarm Clock Registers
Address locations 0Ah-0Eh contain the alarm set-
tings. The alarm can be configured to go off at a
prescribed time on a specific month, date, hour,
minute, or second, or repeat every year, month,
day, hour, minute, or second. Bits RPT5–RPT1
put the alarm in the repeat mode of operation. Ta-
ble 3., page 13 shows the possible configurations.
Codes not listed in the table default to the once per
second mode to quickly alert the user of an incor-
rect alarm setting.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT5–RPT1, the AF (Alarm Flag) is set. If AFE
(Alarm Flag Enable) is also set, the alarm condi-
tion activates the IRQ/OUT pin. To disable the
alarm, write '0' to the Alarm Date Register and to
RPT5–RPT1.
Note: If the address pointer is allowed to incre-
ment to the Flag Register address, an alarm con-
dition will not cause the Interrupt/Flag to occur until
the address pointer is moved to a different ad-
dress. It should also be noted that if the last ad-
dress written is the “Alarm Seconds,” the address
pointer will increment to the Flag address, causing
this situation to occur.
The IRQ output is cleared by a READ to the Flags
Register as shown in Figure 11., page 13. A sub-
sequent READ of the Flags Register is necessary
to see that the value of the Alarm Flag has been
reset to '0.'
Figure 11. Alarm Interrupt Reset Waveform
Table 3. Alarm Repeat Modes
RPT5
RPT4
RPT3
RPT2
RPT1
Alarm Setting
1
Once per Second
1
0
Once per Minute
1
0
Once per Hour
1
000
Once per Day
1
0
Once per Month
0
000
Once per Year
ALARM FLAG BIT (AF)
0Fh
0Eh
00h
HIGH-Z
AI09113
IRQ/OUT
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