參數(shù)資料
型號: M41T315V
廠商: 意法半導(dǎo)體
英文描述: Serial access phantom RTC supervisor
中文描述: 串行訪問幻像時鐘監(jiān)
文件頁數(shù): 16/30頁
文件大?。?/td> 178K
代理商: M41T315V
Clock operation
M41T315Y, M41T315V, M41T315W
16/30
3
Clock operation
3.1
Clock register information
Clock information is contained in eight registers of 8 bits, each of which is sequentially
accessed 1 bit at a time after the 64-bit pattern recognition sequence has been completed.
When updating the clock registers, each must be handled in groups of 8 bits. Writing and
reading individual bits within a register could produce erroneous results. These
READ/WRITE registers are defined in
Table 5 on page 17
.
Data contained in the clock registers is in binary coded decimal format (BCD). Reading and
writing the registers is always accomplished by stepping though all eight registers, starting
with Bit 0 of Register 0 and ending with Bit 7 of Register 7.
3.2
AM-PM/12/24 mode
Bit 7 of the hours register is defined as the 12-hour or 24-hour mode select bit. When high,
the 12-hour mode is selected. In the 12-hour mode, Bit 5 is the AM/PM bit with logic high
being PM. In the 24-hour mode, Bit 5 is the second 10-hour bit (20-23 hours).
3.3
Oscillator and reset bits
Bits 4 and 5 of the day register are used to control the reset and oscillator functions. Bit 4
controls the reset pin input. When the Reset Bit is set to logic '1,' the reset input pin is
ignored. When the Reset Bit is set to logic '0,' a low input on the reset pin will cause the
device to abort data transfer without changing data in the timekeeping registers. Reset
operates independently of all other inputs. Bit 5 controls the oscillator. When set to logic '0,'
the oscillator turns on and the real-time clock/calendar begins to increment.
3.4
Zero bits
Registers 1, 2, 3, 4, 5, and 6 contain one (1) or more bits that will always read logic '0.' When
writing to these locations, either a logic '1' or '0' is acceptable.
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