參數(shù)資料
型號： M41ST85WMX6E
廠商： 意法半導體
英文描述： 3.0/3.3V I2C Combination Serial RTC, NVRAM Supervisor and Microprocessor Supervisor
中文描述： 3.0/3.3V的I2C串行時鐘組合，NVRAM中監(jiān)督員和微處理器監(jiān)控
文件頁數(shù)： 17/34頁
文件大小： 226K
代理商： M41ST85WMX6E
17/34
M41ST85W
Setting Alarm Clock Registers
Address locations 0Ah-0Eh contain the alarm set-
tings. The alarm can be configured to go off at a
prescribed time on a specific month, date, hour,
minute, or second, or repeat every year, month,
day, hour, minute, or second. It can also be pro-
grammed to go off while the M41ST85W is in the
battery back-up to serve as a system wake-up call.
Bits RPT5–RPT1 put the alarm in the repeat mode
of operation.
Table 3.
shows the possible configu-
rations. Codes not listed in the table default to the
once per second mode to quickly alert the user of
an incorrect alarm setting.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT5–RPT1, the AF (Alarm Flag) is set. If AFE
(Alarm Flag Enable) is also set, the alarm condi-
tion activates the IRQ/FT/OUT pin as shown in
Figure 17.
. To disable alarm, write '0' to the Alarm
Date Register and to RPT5–RPT1.
Note:
If the address pointer is allowed to incre-
ment to the Flag Register address, an alarm con-
dition will not cause the Interrupt/Flag to occur until
the address pointer is moved to a different ad-
dress. It should also be noted that if the last ad-
dress written is the “Alarm Seconds,” the address
pointer will increment to the Flag address, causing
this situation to occur.
The IRQ/FT/OUT output is cleared by a READ to
the Flags Register. A subsequent READ of the
Flags Register is necessary to see that the value
of the Alarm Flag has been reset to '0.'
The IRQ/FT/OUT pin can also be activated in the
battery back-up mode. The IRQ/FT/OUT will go
low if an alarm occurs and both ABE (Alarm in Bat-
tery Back-up Mode Enable) and AFE are set. The
ABE and AFE Bits are reset during power-up,
therefore an alarm generated during power-up will
only set AF. The user can read the Flag Register
at system boot-up to determine if an alarm was
generated while the M41ST85W was in the dese-
lect mode during power-up.
Figure 18., page 18
il-
lustrates the back-up mode alarm timing.
Figure 17. Alarm Interrupt Reset Waveform
Table 3. Alarm Repeat Modes
RPT5
RPT4
RPT3
RPT2
RPT1
Alarm Setting
1
1
1
1
1
Once per Second
1
1
1
1
0
Once per Minute
1
1
1
0
0
Once per Hour
1
1
0
0
0
Once per Day
1
0
0
0
0
Once per Month
0
0
0
0
0
Once per Year
AI03664
IRQ/FT/OUT
ACTIVE FLAG
0Fh
0Eh
10h
HIGH-Z
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M41ST85WMX6E2 制造商:STME 功能描述: 制造商:STMicroelectronics 功能描述:
M41ST85WMX6F 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.0/3.3V I2C combination serial RTC, NVRAM supervisor and microprocessor supervisor
M41ST85WMX6TR 功能描述:實時時鐘 Serial 512 (64x8) RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
M41ST85WSH 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR
M41ST85Y 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR
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