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參數(shù)資料
| 型號： | M41ST84WMQ6F |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO16 |
| 封裝： | ROHS COMPLIANT, PLASTIC, SOP-16 |
| 文件頁數(shù)： | 5/34頁 |
| 文件大?。?/td> | 298K |
| 代理商： | M41ST84WMQ6F |
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M41ST84W
Operating modes
Figure 7.
Bus timing requirements sequence
Table 2.
AC characteristics
Symbol
Parameter(1)
1.
Valid for ambient operating temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6 V (except where noted).
Min
Max
Unit
fSCL
SCL clock frequency
0
400
kHz
tBUF
Time the bus must be free before a new transmission can
start
1.3
s
tF
SDA and SCL fall time
300
ns
tHD:DAT
(2)
2.
Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of the falling edge of SCL.
Data hold time
0
s
tHD:STA
START condition hold time
(after this period the first clock pulse is generated)
600
ns
tHIGH
Clock high period
600
ns
tLOW
Clock low period
1.3
s
tR
SDA and SCL rise time
300
ns
tSU:DAT
Data setup time
100
ns
tSU:STA
START condition setup time
(only relevant for a repeated start condition)
600
ns
tSU:STO
STOP condition setup time
600
ns
AI00589
SDA
P
tSU:STO
tSU:STA
tHD:STA
SR
SCL
tSU:DAT
tF
tHD:DAT
tR
tHIGH
tLOW
tHD:STA
tBUF
S
P
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