參數(shù)資料
型號(hào)： M41ST84WMQ6F
廠商： STMICROELECTRONICS
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： 1 TIMER(S), REAL TIME CLOCK, PDSO16
封裝： ROHS COMPLIANT, PLASTIC, SOP-16
文件頁(yè)數(shù)： 2/34頁(yè)
文件大?。?/td> 298K
代理商： M41ST84WMQ6F
Operating modes
M41ST84W
2
Operating modes
The M41ST84W clock operates as a slave device on the serial bus. Access is obtained by
implementing a start condition followed by the correct slave address (D0h). The 64 bytes
contained in the device can then be accessed sequentially in the following order:
1.
Tenths/hundredths of a second register
2.
Seconds register
3.
Minutes register
4.
Century/hours register
5.
Day register
6.
Date register
7.
Month register
8.
Year register
9.
Control register
10.
Watchdog register
11. - 16. Alarm registers
17. - 19. Reserved
20.
Square wave register
21. - 64. User RAM
The M41ST84W clock continually monitors VCC for an out-of tolerance condition. Should
VCC fall below VPFD, the device terminates an access in progress and resets the device
address counter. Inputs to the device will not be recognized at this time to prevent erroneous
data from being written to the device from a an out-of-tolerance system. When VCC falls
below VSO, the device automatically switches over to the battery and powers down into an
ultra low current mode of operation to conserve battery life. As system power returns and
VCC rises above VSO, the battery is disconnected, and the power supply is switched to
external VCC. Write protection continues until VCC reaches VPFD(min) plus trec (min).
For more information on battery storage life refer to application note AN1012.
2.1
2-wire bus characteristics
The bus is intended for communication between different ICs. It consists of two lines: a bi-
directional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be
connected to a positive supply voltage via a pull-up resistor.
The following protocol has been defined:
●
Data transfer may be initiated only when the bus is not busy.
●
During data transfer, the data line must remain stable whenever the clock line is high.
●
Changes in the data line, while the clock line is high, will be interpreted as control
signals.
相關(guān)PDF資料
PDF描述
M41ST85WMH6F 1 TIMER(S), REAL TIME CLOCK, PDSO28
M41ST85WMH6TR 1 TIMER(S), REAL TIME CLOCK, PDSO28
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M41ST84WMQ6TR 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.0/3.3V I2C Serial RTC with Supervisory Functions
M41ST84WSH 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS
M41ST84Y 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS
M41ST84YMH 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS
M41ST84YMH1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS
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