參數(shù)資料
型號(hào): M41ST84W
廠商: 意法半導(dǎo)體
英文描述: 3.0/3.3V I2C Serial RTC with Supervisory Functions(帶監(jiān)視功能的3.0/3.3V I2C串行RTC)
中文描述: 3.0/3.3V I2C串行實(shí)時(shí)時(shí)鐘具有監(jiān)督職能(帶監(jiān)視功能的3.0/3.3V的I2C串行時(shí)鐘)
文件頁(yè)數(shù): 15/29頁(yè)
文件大?。?/td> 481K
代理商: M41ST84W
15/29
M41ST84W
Calibrating the Clock
The M41ST84W is driven by a quartz controlled
oscillator with a nominal frequency of 32,768Hz.
The devices are tested not exceed +/–35 ppm
(parts per million) oscillator frequency error at
25
o
C, which equates to about +/–1.53 minutes per
month. When the Calibration circuit is properly em-
ployed, accuracy improves to better than ±2 ppm
at 25°C.
The oscillation rate of crystals changes with tem-
perature (see
Figure 13., page 16
). Therefore, the
M41ST84W design employs periodic counter cor-
rection. The calibration circuit adds or subtracts
counts from the oscillator divider circuit at the di-
vide by 256 stage, as shown in
Figure
14., page 16
. The number of times pulses which
are blanked (subtracted, negative calibration) or
split (added, positive calibration) depends upon
the value loaded into the five Calibration bits found
in the Control Register. Adding counts speeds the
clock up, subtracting counts slows the clock down.
The Calibration bits occupy the five lower order
bits (D4-D0) in the Control Register (08h). These
bits can be set to represent any value between 0
and 31 in binary form. Bit D5 is a Sign Bit; '1' indi-
cates positive calibration, '0' indicates negative
calibration. Calibration occurs within a 64 minute
cycle. The first 62 minutes in the cycle may, once
per minute, have one second either shortened by
128 or lengthened by 256 oscillator cycles. If a bi-
nary '1' is loaded into the register, only the first 2
minutes in the 64 minute cycle will be modified; if
a binary 6 is loaded, the first 12 will be affected,
and so on.
Therefore, each calibration step has the effect of
adding 512 or subtracting 256 oscillator cycles for
every 125,829,120 actual oscillator cycles, that is
+4.068 or –2.034 ppm of adjustment per calibra-
tion step in the calibration register. Assuming that
the oscillator is running at exactly 32,768Hz, each
of the 31 increments in the Calibration byte would
represent +10.7 or –5.35 seconds per month
which corresponds to a total range of +5.5 or –2.75
minutes per month.
Two methods are available for ascertaining how
much calibration a given M41ST84W may require.
The first involves setting the clock, letting it run for
a month and comparing it to a known accurate ref-
erence and recording deviation over a fixed period
of time. Calibration values, including the number of
seconds lost or gained in a given period, can be
found in Application Note AN934: TIMEKEEPER
CALIBRATION. This allows the designer to give
the end user the ability to calibrate the clock as the
environment requires, even if the final product is
packaged in a non-user serviceable enclosure.
The designer could provide a simple utility that ac-
cesses the Calibration byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of the
IRQ/FT/OUT pin. The pin will toggle at 512Hz,
when the Stop Bit (ST, D7 of 01h) is '0,' the Fre-
quency Test Bit (FT, D6 of 08h) is '1,' the Alarm
Flag Enable Bit (AFE, D7 of 0Ah) is '0,' and the
Watchdog Steering Bit (WDS, D7 of 09h) is '1' or
the Watchdog Register (09h = 0) is reset.
Any deviation from 512Hz indicates the degree
and direction of oscillator frequency shift at the test
temperature.
For
example,
512.010124Hz would indicate a +20 ppm oscillator
frequency error, requiring a –10 (XX001010) to be
loaded into the Calibration Byte for correction.
Note that setting or changing the Calibration Byte
does not affect the Frequency test output frequen-
cy.
The IRQ/FT/OUT pin is an open drain output
which requires a pull-up resistor to V
CC
for proper
operation. A 500 to 10k resistor is recommended
in order to control the rise time. The FT Bit is
cleared on power-down.
a
reading
of
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