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參數(shù)資料
| 型號(hào)： | M41ST84 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 5.0 OR 3.0V, 512 bit (64 x 8) Serial RTC with supervisory functions(具有監(jiān)控功能的5.0V或3.0V，512位(64 x 8)串行RTC) |
| 中文描述： | 5.0或3.0V，512位（64 × 8）（具有監(jiān)控功能的5.0V或3.0V，512位（64 × 8）串行時(shí)鐘監(jiān)督職能的串行時(shí)鐘） |
| 文件頁數(shù)： | 12/31頁 |
| 文件大?。?/td> | 181K |
| 代理商： | M41ST84 |
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M41ST84Y, M41ST84W
12/31
READ Mode
In this mode the master reads the M41ST84Y/W
slave after setting the slave address (see Figure
12, page 12). Following the WRITE Mode Control
Bit (R/W=0) and the Acknowledge Bit, the word
address ‘An’ is written to the on-chip address
pointer. Next the START condition and slave ad-
dress are repeated followed by the READ Mode
Control Bit (R/W=1). At this point the master trans-
mitter becomesthe master receiver. The data byte
which was addressed will be transmitted and the
master receiver will send an Acknowledge Bit to
the slave transmitter. The address pointer is only
incremented on reception of an Acknowledge
Clock. The M41ST84Y/W slave transmitter will
now place the data byte at address An+1 on the
bus, the master receiver reads and acknowledges
the
new
byte
and
the
incremented to “An+2.”
address
pointer
is
This cycle of reading consecutive addresses will
continue until the master receiver sends a STOP
condition to the slave transmitter (see Figure 13,
page 12).
The system-to-user transfer of clock data will be
halted whenever the address being readis aclock
address (00h to 07h). The update will resume ei-
ther due to a Stop Condition or when the pointer
increments to a non-clock or RAM address.
Note:
This is true both in READ Modeand WRITE
Mode.
An alternate READ Mode may also be implement-
ed whereby the master reads the M41ST84Y/W
slave without first writing to the (volatile) address
pointer. The first address that is read is the last
one stored in thepointer (seeFigure 14,page 13).
Figure 12. Slave Address Location
Figure 13. READ Mode Sequence
AI00602
R/W
SLAVE ADDRESS
START
A
0
1
0
0
0
1
1
M
L
AI00899
BUS ACTIVITY:
A
S
A
A
A
N
S
S
P
SDA LINE
BUS ACTIVITY:
MASTER
R
DATA n
DATA n+1
DATA n+X
WORD
ADDRESS (An)
SLAVE
ADDRESS
S
S
R
SLAVE
ADDRESS
A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M41ST84W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| M41ST84W_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:3.0/3.3 V I2C serial RTC with 44 bytes of NVRAM and supervisory functions |
| M41ST84WMH | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| M41ST84WMH1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| M41ST84WMH1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
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